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Issue No. 01 - January (1978 vol. 27)
ISSN: 0018-9340
pp: 90-94
G. Cioffi , Istituto di Automatica, University of Rome
Speed-independent sequential circuits are characterized by an input-output behavior which is independent of the actual delays of the circuitry; this means that any unbounded delay is allowed in the component gates. This performance is accomplished by means of a control circuit which recognizes when the circuit is ready to accept a next input datum, and therefore a speed independent synthesis is realizable if and only if the input source can be controlled by the circuit itself.
speed-independent network, Autotesting, fail safe, machine, modular, self-synchronizing, sequential network
G. Cioffi, "Autotesting Speed-Independent Sequential Circuits", IEEE Transactions on Computers, vol. 27, no. , pp. 90-94, January 1978, doi:10.1109/TC.1978.1674959
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