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Issue No. 09 - September (1975 vol. 24)
ISSN: 0018-9340
pp: 868-878
C.V. Ramamoorthy , Department of Electrical Engineering and Computer Sciences and the Electronics Research Laboratory, University of California
There is an increasing use of error detectors and correctors in computer subsystems, such as parity detectors in memory modules and residue checkers in arithmetic units. Their fault tolerant characteristics are studied through the model of detector redundant systems. Their reliabilities and availabilities are analyzed and compared with those which do not have any such error detectors. The design of fault isolating and reconfiguring networks used in the implementation of such systems are developed.
Availability, critical reliability of detector, detector redundant system, hybrid (N, S), N-tuple modular redundant system, reconfiguration switch, subsystem, triple modular redundant system, validating gate.

n. Yih-Wu Han and C. Ramamoorthy, "Reliability Analysis of Systems with Concurrent Error Detection," in IEEE Transactions on Computers, vol. 24, no. , pp. 868-878, 1975.
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