Issue No. 05 - May (1975 vol. 24)

ISSN: 0018-9340

pp: 534-544

R.C. Ogus , Digital Systems Laboratory, Stanford University

ABSTRACT

The paper discusses two methods to evaluate the signal reliability of the output of logical circuits. It is known that faults present in a circuit will not always cause the output of the circuit to be incorrect. Given the probability of faults occurring in the circuit and the probabilities of the input combinations, it is possible to determine the likelihood of the output being correct. The signal reliability of the output is thus defined as the probability that the circuit output is correct. The first method evaluates the contribution of each fault to the reliability of the circuit and requires the enumeration of the behavior of each fault in the entire fault set. The use of McCluskey and Clegg's characterization of faulty networks by evaluating the functional equivalence classes of the network is a way to reduce the amount of computation involved. Lower bounds can be obtained by considering a restricted fault set, for example, the single fault set. The second method uses a probabilistic model of logical circuits and consists of straightforward operations which can easily be automated. The method also yields the signal reliability and has the capability of very easily specifying the individual fault probabilities of all the circuit lines independently.

INDEX TERMS

Combinational circuits, faults, functional equivalence classes, probabilistic model, reliability, signal reliability.

CITATION

R.C. Ogus, "The Probability of a Correct Output from a Combinational Circuit",

*IEEE Transactions on Computers*, vol. 24, no. , pp. 534-544, May 1975, doi:10.1109/T-C.1975.224257