IEEE Transactions on Computers - Table of contents (PDF)

IEEE Computer Society (PDF)

Editor's Notice (PDF)

Error-Correcting Codes for Byte-Organized Arithmetic Processors (Abstract)

Multiple Fault Detection for Combinational Logic Circuits (Abstract)

Polynomially Complete Fault Detection Problems (Abstract)

Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers (Abstract)

Arithmetic Networks and Their Minimization Using a New Line of Elementary Units (Abstract)

An Optimal Set of Discriminant Vectors (PDF)

Some Properties of Threshold Logic Unit Pattern Recognition Networks (Abstract)

Generating and Counting the Double Adjacencies in a Pure Circulating Shift Register (Abstract)

Hazard Correction in Synchronous Sequential Circuits (Abstract)

Computing Robust Walsh-Fourier Transform by Error Product Minimization (Abstract)

Pipeline Iterative Arithmetic Arrays (Abstract)

Parallel Multiplicative Algorithms for Some Elementary Functions (Abstract)

A Note on Base ?2 Arithmetic Logic (Abstract)

A Computer Interface for Efficient Zero-Crossing Interval Measurement (PDF)

Easily Tested Three-Level Gate Networks for T or More of N Symmetric Functions (Abstract)

Comments on the Review of "Principles of Interactive Computer Graphics" (PDF)

IEEE Computer Society Publications (PDF)

IEEE Computer Society Membership & Publications (PDF)