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TABLE OF CONTENTS
Issue No. 11 - November (vol. 23)
ISSN: 0018-9340
Papers

IEEE Computer Society (PDF)

pp. c2

Interconnections for Parallel Memories to Unscramble p-Ordered Vectors (Abstract)

R.C. Swanson , Department of Computer Science, Digital Systems Laboratory, Stanford University
pp. 1105-1115

A Problem in Multiprogrammed Storage Allocation (Abstract)

T.A. Ryan , Department of Statistics, Pennsylvania State University
pp. 1116-1122

Magnitude of Cross-Coupling Noise in Digital Multiwire Transmission Lines (Abstract)

S. Matsushita , Computer Division, Tokyo Shibaura Electric Company, Ltd.
pp. 1122-1132

On the Design of Logic Networks with Redundancy and Testability Considerations (Abstract)

R. Dandapani , Department of Engineering Technology, University of Iowa
pp. 1139-1149

Design Technique of Fail-Safe Sequential Circuits Using Flip-Flops For Internal Memory (PDF)

Y. Tohma , Department of Electronics, Tokyo Institute of Technology
pp. 1149-1154

Minimal Memory Inverses of Linear Sequential Circuits (Abstract)

null Fu-Min Yuan , Department of Electrical Engineering, University of Notre Dame
pp. 1155-1163

The Logic Machine: A Modular Computer Design System (PDF)

J.Q. Torode , Department of Electrical Engineering and Computer Sciences, University of California
pp. 1164-1169

An Almost-Optimal Algorithm for the Assembly Line Scheduling Problem (Abstract)

M.T. Kaufman , Digital Systems Laboratory, Stanford University
pp. 1169-1174

Finding Prototypes For Nearest Neighbor Classifiers (PDF)

null Chin-Liang Chang , IBM Research Laboratory
pp. 1179-1184

Reconfiguration for Repair in a Class of Universal Logic Modules (Abstract)

F.G. Gray , Department of Electrical Engineering, Virginia Polytechnic Institute and State University
pp. 1185-1194

Application of Multithreshold Elements in the Realization of Many-Valued Logic Networks (Abstract)

A. Druzeta , Department of Electrical Engineering, University of Toronto
pp. 1194-1198

An Example Computer Logic Graph and Its Partitions and Mappings (Abstract)

A. Mennone , IBM Thomas J. Watson Research Center
pp. 1198-1204

Easily Testable Two-Dimensional Cellular Logic Arrays (Abstract)

K.K. Saluja , Department of Electrical Engineering. University of Iowa
pp. 1204-1207

Evaluation of Walsh Power Spectrum of Nearly White Signals (Abstract)

null Chung Kwong Yuen , Computer Centre, Australian National University
pp. 1213-1214

B74-42 Introduction to Discrete Structures (PDF)

K.D. Reiliy , Dep. Inform. Sci. Univ. Alabama
pp. 1215-1216
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