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Issue No.10 - October (1972 vol.21)
pp: 1113-1116
N. Thedchanamoorthy , Department of Mathematics, Algonquin College
A modified binary-weighted resistor multiplying digital-to-analog (MDAC) converter with a full scale (?12 V) analog bandwidth in excess of 500 kHz is described. Its settling time following changes in digital inputs of either polarity is less than 2 , ?s. The dc resolution is 0.01 percent and the dynamic error increases from 0.01 percent at 50 kHz to 0.1 percent at 250 kHz.
Analog switch, computer output devicer, digital-to-analog converter, electronically variable resistor, interface components.
N. Thedchanamoorthy, J.B. Plant, "A Versatile Multiplying Digital-to-Analog Converter", IEEE Transactions on Computers, vol.21, no. 10, pp. 1113-1116, October 1972, doi:10.1109/T-C.1972.223458
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