Application of Uniform Loading Theory to Circuit Packaging and Memory Arrays in High-Speed Computers
Issue No. 05 - May (1972 vol. 21)
H.S. Hou , Xerox Data Systems
The uniform loading theory  has been approximated and used to analyze a class of interconnection problems usually encountered in the design of high-speed circuit packaging and memory arrays in today's computers. The uniform loads are, for example, IC gates and via holes on multilayered printed circuit board and cross-coupling capacitance in memory arrays. They are treated as discrete loads along smooth transmission lines. The input and output transfer function, impulse response, unit step response, and propagation delay are calculated. To a first-order approximation, the pure resistive loaded line impedance and voltage reflection coefficient can be easily derived. Matching conditions and some experimental results are included. Oscillation due to second-order effects is also discussed.
Coupling between word line and digit line, equivalent circuit of via hole, IC gate loading, impulse response of uniform loaded line, loaded impedance, propagation delay of uniform loaded line.
H.S. Hou, "Application of Uniform Loading Theory to Circuit Packaging and Memory Arrays in High-Speed Computers", IEEE Transactions on Computers, vol. 21, no. , pp. 454-463, May 1972, doi:10.1109/T-C.1972.223541