Issue No. 05 - May (1971 vol. 20)
H.L. Parks , IEEE
A batch-fabricated three-dimensional coaxial microelectronic interconnection and packaging technique has been developed that is particularly suited to semiconductor chips of all complexities, ranging from single-junction devices to large-scale integrated circuit devices. The interconnections are coaxial in three dimensions, are formed by electrochemically sculpturing copper planes, and are assembled by pressure-stacking the planes to combinatorially interconnect, mount, and remove heat from high-density semiconductor systems. Although initially developed for high-speed digital systems, the technique is generally universally applicable to other disciplines, such as microwave circuits and structures. Circuit and semiconductor chip package densities can be achieved which offer one to three orders of magnitude increased density over conventional packaging systems. The technique is believed the closest to a truly three-dimensional interconnect medium yet achieved that can be nondestructively disassembled for repair, that has the thermal management capabilities required for high-density systems, and that is free of interconnection crosstalk.
Crosstalk elimination, digital circuit packaging, high-density LSI interconnections, interconnections 3-D shielded, LSI packaging, packaging for high-density circuits, thermal management in high-density packaging.
H. Parks, "Batch-Fabricated Three-Dimensional Planar Coaxial Interconnections for Microelectronic Systems," in IEEE Transactions on Computers, vol. 20, no. , pp. 504-511, 1971.