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TABLE OF CONTENTS
Issue No. 04 - April (vol. 20)
ISSN: 0018-9340

State Assignments for Asynchronous Sequential Machines (Abstract)

Chung-Jen Tan , IBM Corporation, Thomas J. Watson Research Center, Yorktown Heights, N. Y.
pp. 382-391
Papers

On the Design of Universal Boolean Functions (Abstract)

F.P. Preparata , Department of Electrical Engineering and the Coordinated Science Laboratory, University ofIllinois, Urbana, Ill.
pp. 418-423

Alternative Algorithm for Hilbert's Space-Filling Curve (Abstract)

A.R. Butz , Department of Electrical Engineering, Northwestern University, Evanston, Ill.
pp. 424-426

A Characterization of Some Asynchronous Sequential Networks and State Assignments (Abstract)

L.L. Kinney , Department of Electrical Engineering, University of Minnesota, Minneapolis, Minn.
pp. 426-436

Pulse Input Asynchronous Sequential Circuits (PDF)

G. Frosini , Istituto di Elaborazione dell' Informazione del Consiglio Nazionale delle Ricerche, Pisa, Italy
G.B. Gerace , Istituto di Elaborazione dell' Informazione del Consiglio Nazionale delle Ricerche, Pisa, Italy
pp. 436-442

A 40-ns 17-Bit by 17-Bit Array Multiplier (Abstract)

S.D. Pezaris , M.I.T. Lincoln Laboratory, Lexington, Mass.
pp. 442-447

Probabilistic Automata with Monitored Final State Sets (Abstract)

C. De Renna E Souza , University of Notre Dame, Notre Dame, Ind.
pp. 448-452

Single-Parameter Solutions for Flip-Flop Equations (Abstract)

F.M. Brown , Department of Electrical Engineering, Air Force Institute of Technology, Wright-Patterson AFB, Ohio
pp. 452-454

General Shift-Register Sequences of Arbitrary Cycle Length (Abstract)

A.R. Smith , Department of Electrical Engineering, New York University, Bronx, N. Y. 10453
pp. 456-459

On the Delay Required to Realize Boolean Functions (Abstract)

F.P. Preparata , Coordinated Science Laboratory and the Department of Electrical Engineering, University of Illinois, Urbana, Ill. 61801
D.E. Muller , Coordinated Science Laboratory and the Department of Mathematics, University of Illinois, Urbana, Ill. 61801
pp. 459-461

A Graphical Method for Checking Complete Monotonicity (Abstract)

R.O. Fontao , Digital Systems Laboratory, Stanford University, Stanford, Calif.
pp. 461-464

A Method of Solution for Multiple-Valued Logic Expressions (Abstract)

D.D. Givone , Department of Electrical Engineering, Parker Engineering Building, State University of New York at Buffalo, Buffalo, N. Y. 14214
M.E. Liebler , Department of Semiconductor Products, General Electric Company, Buffalo, N. Y.
R.P. Roesser , Department of Electrical Engineering, Wayne State University, Detroit, Mich. 48202
pp. 464-467

On Universal Logic Primitives (Abstract)

G.J. Klir , School of Advanced Technology, State University of New York at Binghamton, Binghamton, N. Y.
pp. 467-469
Papers

On Universal Logic Primitives (Abstract)

G.J. Klir , IEEE
pp. 467-469

Economical Iterative and Range-Transformation Schemes for Division (Abstract)

E.V. Krishnamurthy , Comput. Sci. Unit Indian Statist. Inst.
pp. 470-472

Generation of Right-Linear Grammars from Regular Expressions (Abstract)

A.R. Patel , Comput. Ctr. Univ. Conn.
pp. 472-473

Note on Circuits and Chains of Spread k in the n-Cube (Abstract)

A.D. Wyner , Dep. Appl.Math Weizman Inst. Sci.
pp. 474

A Two-Way Automaton with Fewer States than Any Equivalent One-Way Automaton (Abstract)

B.H. Barnes , Dep. Comput. Sci. Pennsylvania State Univ.
pp. 474-475

Generation of Prime Implicants by Direct Multiplication (Abstract)

J.G. Bredeson , Dept. Elec. Eng. Pennsylvania State Univ.
pp. 475-476

About Feedback and SR Flip-Flops (Abstract)

J.A. Brzozowski , Dep. Appl. Anal. and Comput. Sci. Univ. Waterloo
pp. 476

Contributors (PDF)

pp. 477

Information for Authors (PDF)

pp. 492
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