The Community for Technology Leaders
Green Image
Issue No. 04 - April (1971 vol. 20)
ISSN: 0018-9340
pp: 476
D. Horelick , Stanford Linear Accel. Ctr.
In the above article<sup>1</sup>Rhyne describes a technique for serial binary to BCD (and BCD to binary) conversion using a single clock pulse per bit, as opposed to the two clock per bit method described earlier by Couleur [1]. Although Rhyne may be correct that his method has not been published in the official "scientific engineering" literature, it turns out that this same method has been publi
D. Horelick, "Comment on "Serial Binary-to-Decimal and Decimal-to-Binary Conversion"", IEEE Transactions on Computers, vol. 20, no. , pp. 476, April 1971, doi:10.1109/T-C.1971.223276
88 ms
(Ver 3.3 (11022016))