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In this paper we develop an algorithm to design a switching network using only gates which represent negative functions. The number of gates in the network is minimized under the conditions that 1) the network consists of two levels, and 2) no fan-in restriction on each gate is imposed.
Conjoint, logical design, minimal cover, MOS, negative gates, network with minimum number of gates, supplementary columns, truth table.

T. Ibaraki and S. Muroga, "Synthesis of Networks with a Minimum Number of Negative Gates," in IEEE Transactions on Computers, vol. 20, no. , pp. 49-58, 1971.
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