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TABLE OF CONTENTS
Issue No. 01 - January (vol. 19)
ISSN: 0018-9340
Papers

[Front cover] (PDF)

pp. c1

IEEE Computer Group (PDF)

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Breaker Page (PDF)

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The Extended Resolution Digital Differential Analyzer: A New Computing Structure for Solving Differential Equations (Abstract)

Ragnar N. Nilsen , University of Southern California, Los Angeles.; University of California, Los Angeles.
Robert B. McGhee , University of Southern California, Los Angeles.; The Ohio State University, Columbus, Ohio.
pp. 1-9

An Interactive Computer Approach to Tolerance Analysis (Abstract)

Dorothea M. Bohling , Bell Telephone Laboratories, Holmdel, N. J.
Lawrence A. O'Neill , Bell Telephone Laboratories, Holmdel, N. J.
pp. 10-16

A Generalized Technique for Spectral Analysis (Abstract)

Kenneth L. Caspari , ITT Electro-Physics Laboratories, Inc., Hyattsville, Md.
Harry C. Andrews , ITT Electro-Physics Laboratories, Inc., Hyattsville, Md.; Department of Electrical Engineering, University of Southern California, Los Angeles, Calif. 90007.
pp. 16-25

Computer Simulation of Pulse Propagation Through a Periodic Loaded Transmission Line (Abstract)

Akio Sasaki , Computer Division, Japanese Government Electrotechnical Laboratory, Tokyo, Japan.
S. Watanabe , Computer Division, Japanese Government Electrotechnical Laboratory, Tokyo, Japan.
pp. 25-33

An Error-Detecting Binary Adder: A Hardware-Shared Implementation (Abstract)

Terry G. Gaddess , Coordinated Science Laboratory, University of Illinois, Urbana, Ill. 61801.; Texas Instruments, Inc., Dallas, Tex. 75222.
pp. 34-38

A Scheme for Synchronizing High-Speed Logic: Part I (Abstract)

Herschel H. Loomis , Department of Electrical Engineering, University of California, Davis, Calif. 95616.
Michael R. McCoy , Electronic Arrays Inc., Mountain View, Calif.
pp. 39-47

The Organization of High-Speed Memory for Parallel Block Transfer of Data (Abstract)

Harold S. Stone , Stanford Research Institute, Stanford University, Menlo Park, Calif. 94025.
pp. 47-53

Iteratively Realized Sequential Circuits (Abstract)

Chung-Jen Tan , Department of Electrical Engineering, Columbia University, New York, N. Y.; T. J. Watson Research Center, IBM Corporation, Yorktown Heights, N. Y.
Thomas F. Arnold , Doctoral student in the Department of Electrical Engineering, Columbia University, New York, N. Y.; Bell Telephone Laboratories, Inc., Holmdel, N. J.
Monroe M. Newborn , Department of Electrical Engineering, Columbia University, New York, N. Y.
pp. 54-66

A Logic-in-Memory Computer (Abstract)

Harold S. Stone , Stanford Research Institute, Menlo Park, Calif.
pp. 73-78

A Modified Matrix Algorithm for Determining the Complete Connection Matrix of a Switching Network (Abstract)

Ioan Tomescu , Faculty of Mathematics, University of Bucharest, Bucharest, Rumania
pp. 78-79

A Simple Convergent Algorithm for Rapid Solution of Polynomial Equations (Abstract)

J. B. Moore , Dept. of Elec. Engrg., University of Newcastle, New South Wales 2308, Australia
K. T. Clark , Dept. of Elec. Engrg., University of Newcastle, New South Wales 2308, Australia
pp. 79-80

Mathematical ``Lower Bounds'' and the Logic Circuit Designer (Abstract)

E. S. Schlig , IBM Watson Research Ctr., Yorktown Heights, N. Y.
A. S. Farber , IBM Watson Research Ctr., Yorktown Heights, N. Y.; Responsive Data Processing Corporation, Mt, Kisco, N. Y.
pp. 80-81

Contributors (PDF)

pp. 82-84

Descriptor-in-Context Index (PDF)

pp. 94-99

Identifier Index (PDF)

pp. 99-100

Author Index (PDF)

pp. 100

Information for Authors (PDF)

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