Issue No.10 - October (1969 vol.18)
W.A. Davis , Communications Res. Center
This correspondence presents a logical design procedure for feedback shift registers, which permits the gating of a common clock signal.
Logical design, sequential machine, shift register, state assignment.
W.A. Davis, "Logical Design Using Shift Registers", IEEE Transactions on Computers, vol.18, no. 10, pp. 958-960, October 1969, doi:10.1109/T-C.1969.222554