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Two procedures are presented for detecting and diagnosing arbitrary single-gate failures in combinational logic circuits. A gate is defined as any multiple-input single-output combinational circuit, and a failure is any detectable transformation of the correct gate function. The testing procedures do not require the construction of a fault table and will locate, to within an equivalence class, the faulty gate and describe its failure.
Combinational logic, computer failure detection, diagnostic test generation, fault diagnosis, single-gate failures.
R.N. Spann, G.D. Hornbuckle, "Diagnosis of Single-Gate Failures in Combinational circuits", IEEE Transactions on Computers, vol. 18, no. , pp. 216-220, March 1969, doi:10.1109/T-C.1969.222634
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