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Factoring techniques are incorporated in computer-oriented algorithms for the synthesis of fan-in limited NAND switching networks. Tree networks with reduced gate count or levels of logic are sought. While example FORTRAN programs emphasize computer execution of the algorithms, they are also efficient for hand execution.
Factoring, fan-in limit, logic design automation, NAND networks, synthesis algorithms.
null Yueh-Hsung Su, D.L. Dietmeyer, "Logic Design Automation of Fan-In Limited NAND Networks", IEEE Transactions on Computers, vol. 18, no. , pp. 11-22, January 1969, doi:10.1109/T-C.1969.222521
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