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Issue No. 11 - November (vol. 17)
ISSN: 0018-9340

A Delay Line and Logic Circuits Utilizing Charge-Storage Subharmonic Parametric Oscillators (Abstract)

R.H. Mitchell , Department of Electrical Engineering, Queen's University, Kingston, Ontario, Canada
T. Williams , Texas Instruments Incorporated, Dallas, Tex.
W.D. Ryan , Department of Electrical Engineering, Queen's University, Belfast, Northern Ireland
pp. 1037-1043

Digital System Design Automation—A Method for Designing a Digital System as a Sequential Network System (PDF)

G.B. Gerace , Instituto di Elaberazione della Informazione, Consiglio Nazionale delle Ricerche (C.N.R.), Pisa, Italy
pp. 1044-1061

High-Speed, Interlaced WRITE and READ-Only Operation of a Plated-Wire Memory System (Abstract)

S. Waaben , Bell Telephone Laboratories, Inc., Murray Hill, N. J.
pp. 1062-1065

NORNAND Maitra Cascades (Abstract)

G. Fantauzzi , S.I.T. Siemens, Milan, Italy
pp. 1074-1080

Some Theoretical Properties of Multithreshold Realizable Functions (Abstract)

Yao Tung Yen , Department of Computer Science, University of Illinois, Urbana, Ill. He is now with the National Cash Register Company, Dayton, Ohio
pp. 1081-1088

Comments on "An Algorithm for Synthesis of Multiple-Output Combinational Logic" (PDF)

E.S. Davidson , Dept. of Elec. Engrg., Stanford University, Stanford, Calif. 94305.
G. Metze , Coordinated Science Laboratory, University of Illinois, Urbana, Ill. 61801
pp. 1091-1092

IEEE Computer Group (PDF)

pp. c2

Editor's Notice (PDF)

pp. 1025

NORNAND Maitra Cascades (Abstract)

pp. 1074-1080

A Random-Walk Model of a Queue Storage Problem (Abstract)

E.G. Coffman , Dept. of Electrical Engineering Princeton University
pp. 1093-1095

Contributors (PDF)

pp. 1096-1097

R68-46 Use of Transition Matrices in Compiling (PDF)

J. Earley , Dept. of Computer Science University of California
pp. 1098

Information for Authors (PDF)

pp. 1120
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