Issue No. 09 - September (1968 vol. 17)
Abstract?A new method of designing and implementing intrinsically failure-tolerant counters with error-correcting state assignments is proposed. Threshold logic elements are used, and state recovery circuitry is united with the flip-flop input logic. A decimal counter built according to this method requires considerably fewer components and has a lower probability of failure at less cost than a diode logic version.
Index Terms?Counter, failure-tolerant design, error-correcting reliability, state assignment, threshold logic.
J. Beister, "On the Implementation of Failure-Tolerant Counters," in IEEE Transactions on Computers, vol. 17, no. , pp. 885-886, 1968.