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Issue No. 10 - Oct. (2018 vol. 26)
ISSN: 1063-8210
pp: 2007-2015
Travis E. Schulze , Electrical and Computer Engineering Department, Missouri University of Science and Technology, Rolla, MO, USA
Daryl G. Beetner , Electrical and Computer Engineering Department, Missouri University of Science and Technology, Rolla, MO, USA
Yiyu Shi , Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA
Kevin A. Kwiat , Haloed Sun TEK LLC, Sarasota, FL, USA
Charles A. Kamhoua , Army Research Laboratory, Adelphi, MD, USA
ABSTRACT
Globalization of microchip fabrication opens the possibility for an attacker to insert hardware Trojans into a chip during the manufacturing process. While most defensive methods focus on detection or prevention, a recent method, called Randomized Encoding of Combinational Logic for Resistance to Data Leakage (RECORD), uses data randomization to prevent hardware Trojans from leaking meaningful information even when the entire design is known to the attacker. Both RECORD and its sequential variant require significant area and power overhead. In this paper, a Time-Division Multiplexed version of the RECORD design process is proposed which reduces area overhead by 63% and power by 56%. This time-division multiplexing (TDM) concept is further refined to allow commercial off the shelf (COTS) products and IP cores to be safely operated from a separate chip. These new methods tradeoff latency ( $_$5.3\times $_$ for TDM and $_$3.9\times $_$ for COTS) and energy use to accomplish area and power savings and achieve greater security than the original RECORD process.
INDEX TERMS
Trojan horses, Hardware, Logic gates, Fabrication, Layout, Rails
CITATION

T. E. Schulze, D. G. Beetner, Y. Shi, K. A. Kwiat and C. A. Kamhoua, "Combating Data Leakage Trojans in Commercial and ASIC Applications With Time-Division Multiplexing and Random Encoding," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 10, pp. 2007-2015, 2018.
doi:10.1109/TVLSI.2018.2844180
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