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Issue No. 01 - Jan.-March (2016 vol. 2)
ISSN: 2332-7766
pp: 30-48
Wei-Yu Tsai , Department of Computer Science and Engineering, 354 IST Building, the Pennsylvania State University, University Park, PA
Xueqing Li , Department of Computer Science and Engineering, 354 IST Building, the Pennsylvania State University, University Park, PA
Matthew Jerry , Department of Electrical Engineering, the Pennsylvania State University, University Park, PA
Baihua Xie , Department of Electrical Engineering, the Pennsylvania State University, University Park, PA
Nikhil Shukla , Department of Electrical Engineering, the Pennsylvania State University, University Park, PA
Huichu Liu , Intel Corporation, Santa Clara, CA
Nandhini Chandramoorthy , Department of Computer Science and Engineering, 354 IST Building, the Pennsylvania State University, University Park, PA
Matthew Cotter , Applied Research Laboratory, P.O. Box 30, State College, PA
Arijit Raychowdhury , Georgia Institute of Technology, KLAUS 2362, 266 Ferst Drive, Atlanta, GA
Donald M. Chiarulli , Department of Computer Science, University of Pittsburgh, PA
Steven P. Levitan , Departments of Electrical and Computer Engineering and Computer Science, University of Pittsburgh, 3700 Ohara St., Pittsbugh, PA
Suman Datta , Department of Electrical Engineering, University of Notre Dame, 271 Fitzpatrick Hall, Notre Dame, IN
John Sampson , Department of Computer Science and Engineering, 354 IST Building, the Pennsylvania State University, University Park, PA
Nagarajan Ranganathan , Department of Computer Science and Engineering, University of South Florida, Tampa, FL
Vijaykrishnan Narayanan , Department of Computer Science and Engineering, 354 IST Building, the Pennsylvania State University, University Park, PA
ABSTRACT
High power consumption has significantly increased the cooling cost in high-performance computation stations and limited the operation time in portable systems powered by batteries. Traditional power reduction mechanisms have limited traction in the post-Dennard Scaling landscape. Emerging research on new computation devices and associated architectures has shown three trends with the potential to greatly mitigate current power limitations. The first is to employ steep-slope transistors to enable fundamentally more efficient operation at reduced supply voltage in conventional Boolean logic, reducing dynamic power. The second is to employ brain-inspired computation paradigms, directly embodying computation mechanisms inspired by the brains, which have shown potential in extremely efficient, if approximate, processing with silicon-neuron networks. The third is “let physics do the computation”, which focuses on using the intrinsic operation mechanism of devices (such as coupled oscillators) to do the approximate computation, instead of building complex circuits to carry out the same function. This paper first describes these three trends, and then proposes the use of the hybrid-phase-transition-FET (Hyper-FET), a device that could be configured as a steep-slope transistor, a spiking neuron cell, or an oscillator, as the device of choice for carrying these three trends forward. We discuss how a single class of device can be configured for these multiple use cases, and provide in-depth examination and analysis for a case study of building coupled-oscillator systems using Hyper-FETs for image processing. Performance benchmarking highlights the potential of significantly higher energy efficiency than dedicated CMOS accelerators at the same technology node.
INDEX TERMS
Oscillators, Computer architecture, MOSFET, Neurons, CMOS integrated circuits, Hysteresis, Integrated circuit modeling,{ }, HyperFET, steep slope, coupled oscillators, neural network, spiking neuron, image processing, approximated processing,
CITATION
Wei-Yu Tsai, Xueqing Li, Matthew Jerry, Baihua Xie, Nikhil Shukla, Huichu Liu, Nandhini Chandramoorthy, Matthew Cotter, Arijit Raychowdhury, Donald M. Chiarulli, Steven P. Levitan, Suman Datta, John Sampson, Nagarajan Ranganathan, Vijaykrishnan Narayanan, "Enabling New Computation Paradigms with HyperFET - An Emerging Device", IEEE Transactions on Multi-Scale Computing Systems, vol. 2, no. , pp. 30-48, Jan.-March 2016, doi:10.1109/TMSCS.2016.2519022
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