The Community for Technology Leaders
VLSI, IEEE Computer Society Workshop on (1999)
Orlando, Florida
Apr. 8, 1999 to Apr. 9, 1999
ISBN: 0-7695-0152-4

Committees (PDF)

pp. x
Session 1: System Level Design Examples

Interconnect Architecture Exploration for Low-Energy Reconfigurable Single-Chip DSPs (Abstract)

Jan Rabaey , University of California at Berkeley
Hui Zhang , University of California at Berkeley
Marlene Wan , University of California at Berkeley
Varghese George , University of California at Berkeley
pp. 2

Hardware/Software Codesign of Embedded Systems -The SPI Workbench (Abstract)

D. Ziegenbein , Technical University Braunschweig
L. Thiele , ETH Zurich
K. Richter , Technical University Braunschweig
R. Ernst , Technical University Braunschweig
J. Teich , University GH Paderborn
pp. 9
Session 2: Design Methods

Hardware and Software as Dual Languages for Computer System Modeling (Abstract)

JoAnn M. Paul , Carnegie Mellon University
Donald E. Thomas , Carnegie Mellon University
Sandra J. Weber , Carnegie Mellon University
Simon N. Peffers , Carnegie Mellon University
pp. 20

Energy-Delay Analysis for On-Chip Interconnect at the System Level (Abstract)

Yan Zhang , The Pennsylvania State University
Mary Jane Irwin , The Pennsylvania State University
pp. 26

System Synthesis Based on a Formal Computational Model and Skeletons (Abstract)

Axel Jantsch , Royal Institute of Technology
Ingo Sander , Royal Institute of Technology
pp. 32
Session 3: System-on-a-Chip Design

On the use of C++ for System-on-Chip Design (Abstract)

Gjalt de Jong , Alcatel
Hugo de Man , Katholieke Universiteit Leuven
pp. 42

Clock Power Issues in System-on-a-Chip Designs (Abstract)

R.Y. Chen , The Pennsylvania State University
M.J. Irwin , The Pennsylvania State University
N. Vijaykrishnan , The Pennsylvania State University
pp. 48

Op-Amps as "Firm" Virtual Components for Systems-on-Chip (Abstract)

Rama R. Kotapally , University of Virginia
Mircea R. Stan , University of Virginia
Andrew Slutter , University of Virginia
pp. 54
Session 4: Complete University System Design Projects

A System Design and Build Project on Wearable Computers (Abstract)

Asim Smailagic , Carnegie Mellon University
Dan Siewiorek , Carnegie Mellon University
pp. 62
Session 5: Advanced Hardware Design

Synthesis of Two-Level Dynamic CMOS Circuits (Abstract)

Amar Mukherjee , University of Central Florida
Ajit Pal , Indian Institute of Technology
pp. 82
Session 6: Hardware and System Synthesis

A Hardware Implementation of Realloc Function (Abstract)

Chia-Tien Dan Lo , Illinois Institute of Technology
Witawas Srisa-an , Illinois Institute of Technology
J. Morris Chang , Illinois Institute of Technology
pp. 106

Quality of Service and System Design (Abstract)

Gang Qu , University of California at Los Angeles
Kevin T. Kornegay , Cornell University
Miodrag Potkonjak , University of California at Los Angeles
pp. 112
Session 7: Issues in System Level Design

Timing-Driven System Design (Abstract)

Rajesh K. Gupta , University of California at Irvine
pp. 120

Author Index (PDF)

pp. 133
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