The Community for Technology Leaders
25th IEEE VLSI Test Symposium (VTS'07) (2007)
Berkeley, California
May 6, 2007 to May 10, 2007
ISSN: 1093-0167
ISBN: 0-7695-2812-0
pp: 173-178
Vikram Iyengar , IBM Microelectronics, USA
Kenneth Pichamuthu , IBM Global Engineering Solutions, India
Andy Ferko , IBM Microelectronics, USA
Frank Woytowich , IBM Microelectronics, USA
Dave Lackey , IBM Microelectronics, USA
Gary Grise , IBM Microelectronics, USA
Mark Taylor , IBM Microelectronics, USA
Mike Degregorio , IBM Microelectronics, USA
Steve Oakland , IBM Microelectronics, USA
ABSTRACT
In contract manufacturing, the circuit netlist is owned by the ASIC customer. The manufacturer is required to work strictly within the design structure established by the customer. To manufacture high-quality components in this environment, it is critical to meet the customer's mandated quality and performance criteria, while minimizing hardware overhead and introducing little or no design change. In this paper, the authors present a test framework for contract-manufactured ASICs using low-cost testers. Key aspects of the framework are low hardware overhead, significant savings in test data volume and test cost, and tight integration of the at-speed and ATE-driven test components to the design and manufacturing process.
INDEX TERMS
application specific integrated circuits, automatic test equipment, integrated circuit manufacture
CITATION

V. Iyengar et al., "An Integrated Framework for At-Speed and ATE-Driven Delay Test of Contract-Manufactured ASICs," 25th IEEE VLSI Test Symposium (VTS'07)(VTS), Berkeley, California, 2007, pp. 173-178.
doi:10.1109/VTS.2007.15
83 ms
(Ver 3.3 (11022016))