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Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146) (1999)
San Diego, California
Apr. 26, 1999 to Apr. 30, 1999
ISSN: 1093-0167
ISBN: 0-7695-0146-X
pp: 426
Ankur Jain , Rutgers University
Michael S. Hsiao , Rutgers University
Vamsi Boppana , Fujitsu Labs of America, Inc.
M. Fujita , Fujitsu Labs of America, Inc.
Efficient methods to evaluate the quality of a test set in terms of its coverage of arbitrary defects in a circuit are presented. Our techniques rapidly estimate arbitrary defect coverage because they are independent of specific, physical, fault models. We overcome the potentially explosive computational requirements associated with considering all possible defects by implicitly evaluating multiple faults (of all types) simultaneously and by exploiting the local nature of defects. Our experiments show that a strong correlation exists between stuck-at fault coverage and defects whose behavior is independent of the input vectors. Our techniques are capable of identifying regions in the circuit where defects may escape the test set. We also demonstrate how the chances of detection of an arbitrary defect by a test set vary when a single stuck-at-fault within the vicinity of that defect is detected multiple times by the test set.
Fault Modeling & Simulation, Arbitrary Defects, Vector-Independent and Vector-Dependent Defects.

V. Boppana, A. Jain, M. Fujita and M. S. Hsiao, "On the Evaluation of Arbitrary Defect Coverage of Test Sets," Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146)(VTS), San Diego, California, 1999, pp. 426.
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