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VLSI Design, International Conference on (2005)
Kolkata, India
Jan. 3, 2005 to Jan. 7, 2005
ISSN: 1063-9667
ISBN: 0-7695-2264-5
pp: 138-143
Ian Watson , University of Manchester
Paul Capewell , University of Manchester
Java is increasingly being used as a language and binary format for low power, embedded systems. Current software only approaches to Java execution do not always suit the type of resources available in many embedded systems. Hardware support for Java is a potential solution, reducing memory and power requirements while increasing execution speed. This paper presents a prototype architecture for hardware Java support within a RISC processor core, along with a synthesised asynchronous implementation. A breakdown of gate and silicon level simulation results quantifies where performance increases are achieved, providing a template for future work.
Ian Watson, Paul Capewell, "A RISC Hardware Platform for Low Power Java", VLSI Design, International Conference on, vol. 00, no. , pp. 138-143, 2005, doi:10.1109/ICVD.2005.33
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