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VLSI Design, International Conference on (2000)
Calcutta, India
Jan. 4, 2000 to Jan. 7, 2000
ISSN: 1063-9667
ISBN: 0-7695-0487-6
pp: 144
D. Roy Chowdhury , Indian Institute of Technology
Kolin Paul , Bengal Engineering College (Deemed University)
P. Pal Chaudhuri , Bengal Engineering College (Deemed University)
ABSTRACT
A new scalable pipelined micro-architecture has been proposed for evaluating the Discrete Wavelet Transform which demands very high processing power. The proposed scheme does away with the explicit multiply operation which is both expensive as well time consuming and provides an innovative method to obtain the transformed values of the discrete samples at every clock cycle.
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CITATION
D. Roy Chowdhury, Kolin Paul, P. Pal Chaudhuri, "Scalable Pipelined Micro-Architecture for Wavelet Transform", VLSI Design, International Conference on, vol. 00, no. , pp. 144, 2000, doi:10.1109/ICVD.2000.812599
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