The Community for Technology Leaders
VHDL International User's Forum (1999)
Orlando, Florida
Oct. 4, 1999 to Oct. 6, 1999
ISBN: 0-7695-0465-5
TABLE OF CONTENTS

Program Committee (PDF)

pp. viii
Paper Session 1 — Design Reuse I

Reusable Test Environments for Digital Designs (Abstract)

Michael D. McKinney , Texas Instruments, Incorporated
Robert W. Bowers , Texas Instruments, Incorporated
pp. 2

Designing for the IP Supermarket (Abstract)

Neil Bray , ARM Limited
pp. 8

A Reusable Microcontroller Core's Design (Abstract)

Robert Baraniecki , Institute of Electron Technology
Krystyna Siekierska , Institute of Electron Technology
Ireneusz Janiszewski , Institute of Electron Technology
pp. 14
Workshop 1
Paper Session 2 — Test & Functional Verification

A Verification Concept for Microcontroller Peripheral Development and System Integration (Abstract)

Axel Jahnke , Infineon Technologies, Cores and Modules
Georg Sigl , Infineon Technologies, Cores and Modules
Claus Schneider , Infineon Technologies, Cores and Modules
pp. 24

OBDD Extraction from VHDL Gate Level Descriptions at Design Elaboration (Abstract)

Alex N. Zamfirescu , Alternative System Concepts, Incorporated
Vishwanath Raman , Synopsys, Incorporated
pp. 30
Workshop 2
Paper Session 3 — Design Reuse II

Specification Components: Reusability at the HW/SW System Specification Level (Abstract)

F. Herrera , University of Cantabria
I. Ugarte , University of Cantabria
E. Villar , University of Cantabria
C. Sanz , University of Cantabria
pp. 50

VHDL2HYPER A Highly Flexible Hypertext Generator for VHDL Models (Abstract)

Mike Heuchling , Infineon Technologies
Ke Yang , Technical University of Darmstadt
Jochen Mades , Technical University of Darmstadt
Martin Zambaldi , Infineon Technologies
Andre Windisch , Technical University of Chemnitz
Thomas Schneider , Technical University of Darmstadt
Claus Schneider , Infineon Technologies
Wolfgang Ecker , Infineon Technologies
pp. 57

Hardware/Software Co-Design for IP Objects Based on CORBA (Abstract)

Henning Coors , Eberhard-Karls-Universit?t Tuebingen
Natividad Martinez Madrid , Forschungszentrum Informatik (FZI)
Ralf Seepold , Forschungszentrum Informatik (FZI)
pp. 63
Workshop 3

IEEE 1164 Enhancements Needed for Ips and SoC (Abstract)

Wolfgang Ecker , Infineon Technologies
pp. 70
Embedded Tutorial
Plenary Session — Panel
Paper Session 4 — Business Issues
Workshop 4

Requirements for VHDL 200X (Abstract)

James H. Aylor , University of Virginia
pp. 86
Paper Session 5 — Design Reuse III

VHDL Modeling of an Adaptive Architecture for Real-Time Image Enhancement (Abstract)

A. Zuloaga , University of the Basque Country
U. Bidarte , University of the Basque Country
J.L. Mart , University of the Basque Country
J.A. Ezquerra , University of the Basque Country
pp. 94
Workshop 5

Rosetta ? The SLDL Constraints Language (Abstract)

David L. Barton , AverStar, Incorporated
Perry Alexander , University of Kansas
pp. 108
Workshop Summary

Author Index (PDF)

pp. 109
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