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2018 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom-BigDataSE) (2018)
New York, NY, USA
Aug 1, 2018 to Aug 3, 2018
ISSN: 2324-9013
ISBN: 978-1-5386-4388-4
pp: 1474-1479
ABSTRACT
Side-channel Attack, such as simple power analysis and differential power analysis (DPA), is an efficient method to gather the key, which challenges the security of crypto chips. Side-channel Attack logs the power trace of the crypto chip and speculate the key by statistical analysis. To reduce the threat of power analysis attack, an innovative method based on random execution is proposed in this paper. In order to enhance ability against DPA, the method disorders the correspondence between power trace and operands by scrambling the data execution sequence randomly and dynamically. Experiments and verification are done on the Sakura-G FPGA platform. The results show that the key is not reveal after even 1 million power traces by adopting proposed method and only 1.12% slices overhead is introduced. Compared to unprotected chip, it increases more than 140× measure to disclosure.
INDEX TERMS
cryptography, field programmable gate arrays, statistical analysis
CITATION

S. Chen, W. Ge, J. Yang, B. Liu and J. Yang, "A Power Analysis Attack Countermeasure Based on Random Execution," 2018 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom-BigDataSE), New York, NY, USA, 2018, pp. 1474-1479.
doi:10.1109/TrustCom/BigDataSE.2018.00206
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