The Community for Technology Leaders
Secure System Integration and Reliability Improvement (2008)
July 14, 2008 to July 17, 2008
ISBN: 978-0-7695-3266-0
pp: 203-204
Cache SEE susceptibility measurements are required for predicting processor’s soft error rate in space missions. Previous dynamic or static real beam test based approaches are only tenable for processors which have optional cache operating modes such as disable(bypass)/enable, frozen, etc. As L1 cache are indispensable to the processor’s total performance, some newly introduced processors no longer have such cache management schemes, thus make the existed methods inapplicable. We propose a novel way to determine cache SEE susceptibility for any kind of processors, whether cache bypass mode supported or not, by combining heavy ion dynamic testing with software implemented fault injection approaches.
Single event effects, cache, Code Emulated Upsets, Heavy ion Beam

J. Yang, Y. Wang and Y. Zhou, "A New Method for Measuring Single Event Effect Susceptibility of L1 Cache Unit," Secure System Integration and Reliability Improvement(SSIRI), vol. 00, no. , pp. 203-204, 2008.
98 ms
(Ver 3.3 (11022016))