2013 IEEE Ninth World Congress on Services (2013)

Santa Clara, CA, USA USA

June 28, 2013 to July 3, 2013

pp: 193-200

ABSTRACT

Matrix multiplication is used in a variety of applications. It requires a lot of computation time especially for large-scale matrices. Parallel processing is a good choice for matrix multiplication operation. To overcome the efficiencies of existing algorithms for parallel matrix multiplication, a matrix multiplication processing scheme based on vector linear combination (VLC) was presented. The VLC scheme splits the matrix multiplication procedure into two steps. The first step obtains the weighted vectors by scalar multiplication. The second step gets the final result through a linear combination of the weighted vectors with identical row numbers. We present parallel matrix multiplication implementations using MapReduce (MR) based on VLC scheme and explain in detail the MR job. The map method receives the matrix input and generates intermediate (key, value) pairs according to the VLC scheme requirement. The reduce method conducts the scalar multiplication and vectors summation. In the end, the reduce method outputs the result in the way of row vector. Then performance theoretical analysis and experiment result comparing with other algorithms are proposed. Algorithm presented in this paper needs less computation time than other algorithms. Finally, we conclude the paper and propose future works.

INDEX TERMS

Vectors, Algorithm design and analysis, Matrix decomposition, Sparse matrices, Arrays, Educational institutions, Computational modeling

CITATION

J. Zheng, L. Zhang, R. Zhu, K. Ning and D. Liu, "Parallel Matrix Multiplication Algorithm Based on Vector Linear Combination Using MapReduce,"

*2013 IEEE Ninth World Congress on Services(SERVICES)*, Santa Clara, CA, USA USA, 2013, pp. 193-200.

doi:10.1109/SERVICES.2013.67

CITATIONS

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