The Community for Technology Leaders
SC Conference (1995)
San Diego, California
Dec. 3, 1995 to Dec. 6, 1995
ISBN: 0-89791-816-9
pp: 55
Thomas Sterling , NASA Goddard Space Flight Center and University of Maryland
Daniel Savarese , University of Maryland and NASA Goddard Space Flight Center
Peter MacNeice , Hughes STX
Kevin Olson , George Mason University
Clark Mobarry , NASA/GSFC Space Data Computing Division
Bruce Fryxell , George Mason University
Phillip Merkey , NASA Goddard Space Flight Center
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical structure of processing communication and memory name-space management resources to provide a scalableNUMA environment. Ensembles of 8 HP PA-RISC7100 microprocessorsemploy an internal cross-bar switch and directory based cache coherence scheme to provide a tightly coupled SMP.Up to 16 processing ensembles are interconnected by a 4 ring network incorporating a full hardware implementation of the SCI protocol for a full system configuration of 128 processors. This paper presents the findings of a set of empirical studies using both synthetic test codes and full applications for the Earth and space sciences to characterize the performance properties of this new architecture. It is shown that overhead and latencies of global primitive mechanisms, while low in absolute time, are significantly more costly than similar functions local to an individual processor ensemble.

T. Sterling et al., "A Performance Evaluation of the Convex SPP-1000 Scalable Shared Memory Parallel Computer," SC Conference(SC), San Diego, California, 1995, pp. 55.
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