The Community for Technology Leaders
Integrated Circuit Design and System Design, Symposium on (1999)
Natal, Brazil
Sept. 29, 1999 to Oct. 1, 1999
ISBN: 0-7695-0387-X
TABLE OF CONTENTS

Foreword (Abstract)

pp. ix

Symposium Committees (Abstract)

pp. x

Reviewers (Abstract)

pp. xii

Sponsoring Societies (Abstract)

pp. xiii
Tutorial 1
Session 1: Microprocessors Design

A Bit Scalable Architecture for Fuzzy Processors (Abstract)

Osamu Saotome , ITA Instituto Tecnol?gico de Aeron?utica
Karl Heinz Kienitz , ITA Instituto Tecnol?gico de Aeron?utica
Roberto d'Amore , ITA Instituto Tecnol?gico de Aeron?utica
pp. 0008
Session 2: Modelling

Conductances and Noise in Trapezoidal Association of Transistors for Analog Applications Using a SOT Methodology (Abstract)

Sergio Bampi , Federal University of Rio Grande do Sul
Jung Hyun Choi , Federal University of Rio Grande do Sul
pp. 0022
Session 3: Co-Design

Estimating Functional Unit Number in the PISH Codesign System by using Petri Nets (Abstract)

Edna Barros , Universidade de Pernambuco
Wolfgang Rosenstiel , Universit?t Tuebingen
Paulo Maciel , Universidade de Pernambuco
pp. 0032

Codesign System Performance based on Memory Configurations (Abstract)

Nadia Nedjah , Universidade do Estado do Rio de Janeiro
Luiza de Macedo Mourelle , Universidade do Estado do Rio de Janeiro
pp. 0036

Hardware/Software Specification, Design and Test using a System Level Approach (Abstract)

I.M. Teixeira , Universidade T?cnica de Lisboa
J. Semião , Universidade do Algarve
O.P. Dias , Instituto Polit?cnico de Set?
J.P. Teixeira , Universidade T?cnica de Lisboa
C.E. Pereira , Universidade Federal Rio Grande do Sul
pp. 0042

An Approach for Microsystems Codesign (Abstract)

Frank H. Behrens , PUC Campinas
Renato P. Ribas , PUC Campinas
pp. 0046
Session 4: Analog Design

A Multi-Functional Cell for CMOS Analog Applications in Low-Voltage (Abstract)

Chi-Hung Lin , Ohio State University
M. Ismail , Ohio State University
Laércio Caldeira , Escola Federal de Engenharia de Itajub?
Tales C. Pimenta , Escola Federal de Engenharia de Itajub?
pp. 0052
Session 5: High Level Synthesis
Session 5: High Level Synthesis

Register Files Constraint Satisfaction during Scheduling of DSP code (Abstract)

Bart Mesman , Eindhoven University of Technology
Carlos A. Alba Pinto , Eindhoven University of Technology
Koen Van Eijk , Eindhoven University of Technology
pp. 0074
Session 6: Digital Design I

An 9-Bit Parallel Pipelined Multiplier based on the 3-bit Recoding from Booth's Algorithm (Abstract)

Tales Cleber Pimenta , Escola Federal de Engenharia de Itajub?
Evandro D.C. Cotrim , Escola Federal de Engenharia de Itajub?
Laércio Caldeira , Escola Federal de Engenharia de Itajub?
pp. 0088

MCA: A Single Chip One-Port Scalable ATM Layer Controller (Abstract)

Antonio Carlos Cavalcanti , Universidade Federal da Para?ba
José Antônio Gomes de Lima , Universidade Federal da Para?ba
Elmar U.K. Melchier , Universidade Federal da Para?ba
pp. 0092
Tutorial 2

Symbolic Model Checking in Practice (Abstract)

Sérgio Vale Aguiar Campos , Universidade Federal de Minas Gerais
pp. 0098
Panel: Is Open Source CAD Software the Way for Innovation ?
Session 7: Mixed-Signal Design and Test, IEEE TTTC-LA Special Session

Circuit-Level Considerations for Mixed Signals Programmable Components (Abstract)

Luigi Carro , Universidade Federal do Rio Grande do Sul
pp. 0106

A Low Sensitivity Switched-Capacitor Filter Design with Testability Features (Abstract)

Antonio Petraglia , Federal University of Rio de Janeiro
José Gabriel R.C. Gomes , Federal University of Rio de Janeiro
Jorge M. Cañive , Federal University of Rio de Janeiro
pp. 0115
Session 8: Digital Design II

High Speed FIR Filters for Digital Decimation (Abstract)

Valentino Liberali , Universit? di Pavia
Marco Brambilla , Micro System Architecturing
Daniele Guidi , Micro System Architecturing
pp. 0124
Tutorial 3
Session 9: Synthesis and Reconfiguration

Logic and High Level Synthesis for Communication Protocols (Abstract)

Ricardo N.B. Lima , Universidade Federal do Rio de Janeiro
Emerson Carli , Universidade Federal do Rio de Janeiro
Luci Pirmez , Universidade Federal do Rio de Janeiro
Antônio C. de Mesquita , Universidade Federal do Rio de Janeiro
Aloysio C.P. Pedroza , Universidade Federal do Rio de Janeiro
pp. 0142
Session 10: Digital Testing I, IEEE TTTC-LA Special Session

Test Escapes: Analysis of Short Defect (Abstract)

F. Azaïs , Universit? de Montpellier II
M. Renovell , Universit? de Montpellier II
Y. Bertrand , Universit? de Montpellier II
pp. 0160

Effects of Radiation on Digital Architectures: One Year Results from a Satellite Experiment (Abstract)

R. Velazco , Laboratoire TIMA
R. Ecoffet , Centre National d'Etudes Spatiales
Ph. Cheynet , Laboratoire TIMA
pp. 0164

On-Line Testing of a Switching Circuit (Abstract)

Marcelo S. Lubaszewski , Universidade Federal do Rio Grande do Sul
Leandro J. Cassol , Universidade Federal do Rio Grande do Sul
Janor A. Bastos , Universidade Federal do Rio Grande do Sul
Jáder A. Kussler , Universidade Federal do Rio Grande do Sul
pp. 0174
Session 11: CAD Tools

Covering Strategies for Library Free Technology Mapping (Abstract)

André Inácio Reis , Universidade Federal do Rio Grande do Sul
pp. 0180

Project Management and Design Methodology Support for the CAVE Project: A Hyperdocument-Centric Approach (Abstract)

Leandro Soares Indrusiak , Pontif?cia Universidade Cat?lica do Rio Grande do Sul
Ricardo Augusto da Luz Reis , Universidade Federal do Rio Grande do Sul
pp. 0188
Session 12: Digital Testing II, IEEE TTTC-LA Special Session

Implementing a Self-Testing 8051 Microprocessor (Abstract)

Erika F. Cota , CPGCC/UFRGS
Luigi Carro , CPGCC/UFRGS
Marcelo Lubaszewski , CPGCC/UFRGS
Margrit R. Krug , CPGCC/UFRGS
Altamiro A. Susin , CPGCC/UFRGS
pp. 0202

Design for Testability Reuse in Synthesis for Testability (Abstract)

Peter Bukovjan , LIP6 Laboratory
Walid Maroufi , LIP6 Laboratory
Meryem Marzouki , LIP6 Laboratory
pp. 0206
Session 13: IP Cores

Specification and Design of an Ethernet Interface Soft IP (Abstract)

Juergen Rochol , Universidade Federal do Rio Grande do Sul
Ricardo Reis , Universidade Federal do Rio Grande do Sul
João Fragoso , Universidade Federal do Rio Grande do Sul
Sergio Bampi , Universidade Federal do Rio Grande do Sul
Eduardo Costa , Universidade Federal do Rio Grande do Sul
pp. 0216

SCOB, A Soft-Core for the Blowfish Cryptographic Algorithm (Abstract)

Antônio C.C. Vieira , Federal University of Rio de Janeiro and Brazilian Army R & D Institute - IPD
Sérgio L.C. Salomäo , Military Institute of Engineering and Federal University of Rio de Janeiro
Vladimir C. Alves , Federal University of Rio de Janeiro
M.S. de Alcântara , Federal University of Rio de Janeiro
pp. 0220
Tutorial 4

Index of Authors (Abstract)

pp. 0235
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