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Computer Architecture and High Performance Computing, Symposium on (2006)
Ouro Preto, MG, Brazil
Oct. 17, 2006 to Oct. 20, 2006
ISSN: 1550-6533
ISBN: 0-7695-2704-3
TABLE OF CONTENTS
Cover
Introduction
High Perfomance Applications

ParTriCluster: A Scalable Parallel Algorithm for Gene Expression Analysis (Abstract)

Renata Araujo , Universidade Federal de Minas Gerais, Brazil
Guilherme Trielli , Universidade Federal de Minas Gerais, Brazil
Gustavo Orair , Universidade Federal de Minas Gerais, Brazil
Wagner Meira Jr. , Universidade Federal de Minas Gerais, Brazil
Renato Ferreira , Universidade Federal de Minas Gerais, Brazil
Dorgival Guedes , Universidade Federal de Minas Gerais, Brazil
pp. 3-10

Towards Production Code Effective Portability among Vector Machines and Microprocessor-Based Architectures (Abstract)

Alvaro Luiz Fazenda , Instituto Nacional de Pesquisas Espaciais, Brazil
Eduardo Hidenori Enari , Instituto Nacional de Pesquisas Espaciais, Brazil
Luiz Flavio Rodrigues , Instituto Nacional de Pesquisas Espaciais, Brazil
Jairo Panetta , Instituto Nacional de Pesquisas Espaciais, Brazil
pp. 11-20
Grid and Cluster Computing 1

Data Segmentation Management Infrastructure in a Database Grid (Abstract)

Reinaldo Lourenso , Universidade de S?o Paulo, Brazil
Sergio Takeo Kofuji , Universidade de S?o Paulo, Brazil
pp. 21-27

Detecting Malicious Manipulation in Grid Environments (Abstract)

Felipe Martins , Federal University of Ceara, Brazil
Marcio Maia , Federal University of Ceara, Brazil
Rossana M. de Castro Andrade , Federal University of Ceara, Brazil
Aldri L. dos Santos , Federal University of Ceara, Brazil
Jose Neuman de Souza , Federal University of Ceara, Brazil
pp. 28-35

Policy-based Resource Allocation in Hierarchical Virtual Organizations for Global Grids (Abstract)

Kyong Hoon Kim , The University of Melbourne, Australia
Rajkumar Buyya , The University of Melbourne, Australia
pp. 36-46
Processor Microarchitecture

A Speculative Trace Reuse Architecture with Reduced Hardware Requirements (Abstract)

Maur??cio L. Pilla , UCPEL, Brazil
Bruce R. Childers , Univ. of Pittsburgh, USA
Amarildo T. da Costa , IME, Brazil
Felipe M. G. Franca , COPPE-UFRJ, Brazil
Philippe O. A. Navaux , UFRGS, Brazil
pp. 47-54

The mDTSVLIW: a Multi-Threaded Trace-based VLIW Architecture (Abstract)

P. Rounce , University College London, UK
A. F. De Souza , Universidade Federal do Esp?rito Santo, Brazil
pp. 63-72
Grid and Cluster Computing 2

GerpavGrid: using the Grid to maintain the city road system (Abstract)

Cesar A. F. De Rose , PUCRS, Brazil
Tiago C. Ferreto , PUCRS, Brazil
Marcelo B. de Farias , DBServer, Brazil
Vladimir G. Dias , DBServer, Brazil
Walfredo Cirne , UFCG, Brazil
Milena P. M. Oliveira , UFCG, Brazil
Katia Saikoski , HP Brazil, Brazil
Maria Luiza Danieleski , SMOV, Brazil
pp. 73-80

A Run-time System for Efficient Execution of Scientific Workflows on Distributed Environments (Abstract)

George Teodoro , Universidade Federal de Minas Gerais, Brazil
Tulio Tavares , Universidade Federal de Minas Gerais, Brazil
Renato Ferreira , Universidade Federal de Minas Gerais, Brazil
Tahsin Kurc , The Ohio State University, USA
Wagner Meira Jr. , Universidade Federal de Minas Gerais, Brazil
Dorgival Guedes , Universidade Federal de Minas Gerais, Brazil
Tony Pan , The Ohio State University, USA
Joel Saltz , The Ohio State University, USA
pp. 81-90
Performance Measurement and Analysis

Dual-Thread Speculation: Two Threads in the Machine are Worth Eight in the Bush (Abstract)

Fredrik Warg , Chalmers University of Technology, Sweden
Per Stenstrom , Chalmers University of Technology, Sweden
pp. 91-98

Characterizing the Performance of Data Management Systems on Hyper-Threaded Architectures (Abstract)

Wessam M. Hassanein , University of Calgary, Canada
Moustafa A. Hammad , University of Calgary, Canada
Layali Rashid , University of Calgary, Canada
pp. 99-106

Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach (Abstract)

Ram Srinivasan , New Mexico State University, Los Alamos National Laboratory, USA
Jeanine Cook , New Mexico State University, Los Alamos National Laboratory, USA
Olaf Lubeck , New Mexico State University, Los Alamos National Laboratory, USA
pp. 107-116
Memory Hierarchy Architecture

Scalable Value-Cache Based Compression Schemes for Multiprocessors (Abstract)

Martin Thuresson , Chalmers University of Technology, Sweden
Per Stenstrom , Chalmers University of Technology, Sweden
pp. 117-124

Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption (Abstract)

Abel Guilhermino Silva Filho , University of Pernambuco (UPE), Brazil
Pablo Viana , Federal University of Pernambuco (UFPE), Brazil
Edna Barros , Federal University of Pernambuco (UFPE), Brazil
Manoel Eusebio Lima , Federal University of Pernambuco (UFPE), Brazil
pp. 125-132

Applying the zeros switch-off technique to reduce static energy in data caches (Abstract)

R. Ubal , Universidad Politecnica de Valencia, Spain
J. Sahuquillo , Universidad Politecnica de Valencia, Spain
S. Petit , Universidad Politecnica de Valencia, Spain
P. Lopez , Universidad Politecnica de Valencia, Spain
pp. 133-140

32-core CMP with multi-sliced L2: 2 and 4 cores sharing a L2 slice (Abstract)

Mario Donato Marino , Polytechnic School of University of S?o Paulo, Brazil
pp. 141-150
Parallel and Distributed Algorithms, Architectures and Interconnection Networks

Combining Source Routing and Dynamic Fault Tolerance (Abstract)

Frank Olaf Sem-Jacobsen , Simula Research Laboratory, Norway
Olav Lysne , Simula Research Laboratory, Norway
Tor Skeie , Simula Research Laboratory, Norway
pp. 151-158

Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference (Abstract)

Vasanth Krishna Namasivayam , University of Southern California, Los Angeles, USA
Animesh Pathak , University of Southern California, Los Angeles, USA
Viktor K. Prasanna , University of Southern California, Los Angeles, USA
pp. 167-176
Reconfigurable Systems and Operating System Support for Specific Applications

Reconfigurable System with Virtuoso Real-Time Kernel and TEV Environment (Abstract)

M. C. Andrade , Universidade Federal de S?o Carlos, Brazil
C. E. Mor? , Universidade Federal de S?o Carlos, Brazil
J. H Saito , Universidade Federal de S?o Carlos, Brazil
pp. 177-184

Virtual-Machine-based Intrusion Detection on File-aware Block Level Storage (Abstract)

Youhui Zhang , Tsinghua University, China
Yu Gu , Tsinghua University, China
Hongyi Wang , Tsinghua University, China
Dongsheng Wang , Tsinghua University, China
pp. 185-192
Author Index

Author Index (PDF)

pp. 193
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