The Community for Technology Leaders
Application Specific Processors, Symposium on (2010)
Anaheim, CA, USA
June 13, 2010 to June 14, 2010
ISBN: 978-1-4244-7953-5
TABLE OF CONTENTS
Papers

Title pages (Abstract)

pp. i-xiii

Next-generation consumer audio application specific embedded processor (Abstract)

He Xiao , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Xianmin Chen , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Jin Wang , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Peilin Liu , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Rendong Ying , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Zhenqi Wei , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Xingguang Pan , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Jun Wang , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
Ji Kong , School of Electronic, Information and Electrical Engineering, Shanghai Jiao Tong University, China
pp. 1-7

CMA: Chip multi-accelerator (Abstract)

Sami Yehia , Thales Research and Technology, France
Dominik Auras , Thales Research and Technology, France
Sylvain Girbal , Thales Research and Technology, France
Olivier Temam , INRIA Saclay, France
Hugues Berry , INRIA Saclay, France
pp. 8-15

Processor accelerator for AES (Abstract)

Ruby B. Lee , Department of Electrical Engineering, Princeton University, USA
Yu-Yuan Chen , Department of Electrical Engineering, Princeton University, USA
pp. 16-21

A hardware pipeline for accelerating ray traversal algorithms on streaming processors (Abstract)

Michael Steffen , Electrical and Computer Engineering, Iowa State University, USA
Joseph Zambreno , Electrical and Computer Engineering, Iowa State University, USA
pp. 22-29

Ultra low energy Domain Specific Instruction-set Processor for on-line surveillance (Abstract)

L. Van der Perre , IMEC, Leuven, Belgium
D. Novo , IMEC, Leuven, Belgium
A. Kritikakou , University of Patras, Greece
P. Raghavan , IMEC, Leuven, Belgium
J. Huisken , IMEC, Eindhoven, Netherlands
F. Catthoor , IMEC, Leuven, Belgium
pp. 30-35

Customized architectures for faster route finding in GPS-based navigation systems (Abstract)

Jason Loew , SUNY Binghamton Computer Science Department, USA
Patrick H. Madden , SUNY Binghamton Computer Science Department, USA
Dmitry Ponomarev , SUNY Binghamton Computer Science Department, USA
pp. 36-43

A processing engine for GPS correlation (Abstract)

Ahmed T. Erdogan , The University of Edinburgh, School of Engineering, EH9 3JL, UK
Ahmed O. El-Rayis , The University of Edinburgh, School of Engineering, EH9 3JL, UK
Tughrul Arslan , The University of Edinburgh, School of Engineering, EH9 3JL, UK
pp. 44-49

A Coarse Grain Reconfigurable Architecture for sequence alignment problems in bio-informatics (Abstract)

Ahmed Hemani , Dept. of ES, School of ICT, KTH, Forum 120, Isafjordsgatan 39, Stockholm, 164 40 KISTA, Sweden
Pei Liu , Dept. of ES, School of ICT, KTH, Forum 120, Isafjordsgatan 39, Stockholm, 164 40 KISTA, Sweden
pp. 50-57

An RTOS in hardware for energy efficient software-based TCP/IP processing (Abstract)

Naotaka Maruyama , Kernelon Silicon Inc., Kugenuma-Ishigami, Fujisawa, 251-0025, Japan
Tohru Ishihara , Kyushu University, 3-8-33 Momochihama, Sawara-ku, Fukuoka, 814-0001, Japan
Hiroto Yasuura , Kyushu University, 6-10-1 Hakozaki, Higashi-ku, Fukuoka, 812-8581, Japan
pp. 58-63

FPGA and GPU implementation of large scale SpMV (Abstract)

Yu Wang , Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
Yi Shan , Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
Ningyi Xu , Hardware Computing Group, Microsoft Research Asia, China
Zilong Wang , Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
Huazhong Yang , Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
Bo Wang , Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
Tianji Wu , Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
pp. 64-70

Accelerating DNA analysis applications on GPU clusters (Abstract)

Antonino Tumeo , High Performance Computing, Pacific Northwest National Laboratory, Richland, WA, USA
Oreste Villa , High Performance Computing, Pacific Northwest National Laboratory, Richland, WA, USA
pp. 71-76

Efficient template matching with variable size templates in CUDA (Abstract)

Laurie Smith King , Department of Mathematics and Computer Science, College of the Holy Cross, Worcester, MA, USA
Nicholas Moore , Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA
Miriam Leeser , Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA
pp. 77-80

I-cache configurability for temperature reduction through replicated cache partitioning (Abstract)

Mathew Paul , University of Maryland at College Park, ECE Department, USA
Peter Petrov , University of Maryland at College Park, ECE Department, USA
pp. 81-86

A novel configuration circuit architecture to speedup reconfiguration and relocation for partially reconfigurable devices (Abstract)

Georgi Gaydadjiev , Computer Engineering Laboratory, EEMCS, Delft University of Technology, Netherlands
Thomas Marconi , Computer Engineering Laboratory, EEMCS, Delft University of Technology, Netherlands
Koen Bertels , Computer Engineering Laboratory, EEMCS, Delft University of Technology, Netherlands
Jae Young Hur , Computer Engineering Laboratory, EEMCS, Delft University of Technology, Netherlands
pp. 87-92

A dynamically reconfigurable asynchronous processor (Abstract)

M. Muir , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
I. Nousias , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
A. Erdogan , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
I. Lindsay , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
S. Khawam , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
K.A. Fawaz , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
T. Arslan , School of Engineering, University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
pp. 93-96

Design of a custom VEE core in a chip multiprocessor (Abstract)

Dan Upton , Department of Computer Science, University of Virginia, USA
Kim Hazelwood , Department of Computer Science, University of Virginia, USA
pp. 97-100

Minimizing write activities to non-volatile memory via scheduling and recomputation (Abstract)

Qingfeng Zhuge , Department of Computer Science, University of Texas at Dallas, Richardson, 75080, USA
Wei-Che Tseng , Department of Computer Science, University of Texas at Dallas, Richardson, 75080, USA
Chun Jason Xue , Department of Computer Science, City University of Hong Kong, Tat Chee Ave, Kowloon, Hong Kong
Jingtong Hu , Department of Computer Science, University of Texas at Dallas, Richardson, 75080, USA
Edwin H.-M. Sha , Department of Computer Science, University of Texas at Dallas, Richardson, 75080, USA
pp. 101-106

Early performance-cost estimation of application-specific data path pipelining (Abstract)

Daniel D. Gajski , Center for Embedded Computer Systems, University of California, Irvine, USA
Jelena Trajkovic , Computer Science Department, École Polytechnique de Montréal, Canada
pp. 107-110

Efficient design and generation of a multi-facet arbiter (Abstract)

Sih-Sian Wu , Department of Electrical Engineering, National Cheng Kung University, Tainan, 701 Taiwan
Jer Min Jou , Department of Electrical Engineering, National Cheng Kung University, Tainan, 701 Taiwan
Yun-Lung Lee , Department of Electrical Engineering, National Cheng Kung University, Tainan, 701 Taiwan
pp. 111-114

Reconfigurable custom functional unit generation and exploitation in multiple-issue processors (Abstract)

Jean Jyh-Jiun Shann , Dept. of Computer Science, National Chiao Tung University, Hsinchu, Taiwan
Chung-Ping Chung , Dept. of Computer Science, National Chiao Tung University, Hsinchu, Taiwan
I-Wei Wu , Dept. of Computer Science, National Chiao Tung University, Hsinchu, Taiwan
Hui-Shan Wang , Dept. of Computer Science, National Chiao Tung University, Hsinchu, Taiwan
pp. 115-118
84 ms
(Ver )