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Application Specific Processors, Symposium on (2009)
San Francisco, CA, USA
July 27, 2009 to July 28, 2009
ISBN: 978-1-4244-4939-2
TABLE OF CONTENTS
Papers

Heterogeneous multi-core architectures with dynamically reconfigurable processors for wireless communication (Abstract)

Ahmet T. Erdogan , University of Edinburgh, UK
Wei Han , University of Edinburgh, UK
Ying Yi , University of Edinburgh, UK
Mark Muir , University of Edinburgh, UK
Tughrul Arslan , University of Edinburgh, UK
Xin Zhao , University of Edinburgh, UK
pp. 1-6

Workload adaptive shared memory multicore processors with reconfigurable interconnects (Abstract)

Rakesh Kumar , Department of Electrical and Computer Engineering, University of Illinois at Urbana Champaign, USA
Deming Chen , Department of Electrical and Computer Engineering, University of Illinois at Urbana Champaign, USA
Shoaib Akram , Department of Electrical and Computer Engineering, University of Illinois at Urbana Champaign, USA
pp. 7-14

A dataflow-centric approach to design low power control paths in CGRAs (Abstract)

Hyunchul Park , Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, USA
Scott Mahlke , Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, USA
Yongjun Park , Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, USA
pp. 15-20

A design space exploration methodology supporting run-time resource management for multi-processor Systems-on-chip (Abstract)

Cristina Silvano , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Italy
Giovanni Mariani , ALaRI - University of Lugano, Switzerland
Vittorio Zaccaria , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Italy
Gianluca Palermo , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Italy
pp. 21-28

Power-efficient medical image processing using PUMA (Abstract)

Kevin Fan , Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, USA
Scott Mahlke , Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, USA
Ganesh Dasika , Advanced Computer Architecture Laboratory, University of Michigan - Ann Arbor, USA
pp. 29-34

FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs (Abstract)

Wen-Mei W. Hwu , Electrical&Computer Eng. Dept., University of Illinois, Urbana-Champaign, USA
Jason Cong , Computer Science Dept., University of California, Los-Angeles, USA
John A. Stratton , Electrical&Computer Eng. Dept., University of Illinois, Urbana-Champaign, USA
Alexandros Papakonstantinou , Electrical&Computer Eng. Dept., University of Illinois, Urbana-Champaign, USA
Deming Chen , Electrical&Computer Eng. Dept., University of Illinois, Urbana-Champaign, USA
Karthik Gururaj , Computer Science Dept., University of California, Los-Angeles, USA
pp. 35-42

A memory optimization technique for software-managed scratchpad memory in GPUs (Abstract)

Majid Sarrafzadeh , Computer Science Department, University of California, Los Angeles, USA
Alex Bui , Department of Radiological Sciences, University of California, Los Angeles, USA
Maryam Moazeni , Computer Science Department, University of California, Los Angeles, USA
pp. 43-49

Register Multimapping: A technique for reducing register bank conflicts in processors with large register files (Abstract)

Rakesh Kumar , Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, USA
Nam Duong , Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, USA
pp. 50-53

Arithmetic optimization for custom instruction set synthesis (Abstract)

Ajay K. Verma , Ecole Polytechnique Fédérale de Lausanne (EPFL), School of Computer and Communication Science, CH-1015, Switzerland
Paolo Ienne , Ecole Polytechnique Fédérale de Lausanne (EPFL), School of Computer and Communication Science, CH-1015, Switzerland
Yi Zhu , Department of Computer Science and Engineering, University of California, San Diego, La Jolla, 92093, USA
Philip Brisk , Ecole Polytechnique Fédérale de Lausanne (EPFL), School of Computer and Communication Science, CH-1015, Switzerland
pp. 54-57

A new addressing mode for the encoding space problem on embedded processors (Abstract)

Minwook Ahn , School of Electrical Engineering and Computer Science, Seoul National University, Korea
Sechul Shin , School of Electrical Engineering and Computer Science, Kyungpook National University, Korea
Jonghee W. Yoon , School of Electrical Engineering and Computer Science, Seoul National University, Korea
Jonghee M. Youn , School of Electrical Engineering and Computer Science, Seoul National University, Korea
Jeonghun Cho , School of Electrical Engineering and Computer Science, Kyungpook National University, Korea
Yunheung Paek , School of Electrical Engineering and Computer Science, Seoul National University, Korea
Daeho Kim , School of Electrical Engineering and Computer Science, Seoul National University, Korea
Hochang Chae , School of Electrical Engineering and Computer Science, Kyungpook National University, Korea
pp. 58-61

Driver assistance system design and its optimization for FPGA based MPSoC (Abstract)

Yassin El-Hillali , University of Valenciennes, France
Mazen Saghir , Texas A&M Engineering Building, Education City, Doha, Qatar
Jehangir Khan , University of Valenciennes, France
Atika Rivenq , University of Valenciennes, France
Smail Niar , University of Valenciennes, France
pp. 62-65

Hardware acceleration of multi-view face detection (Abstract)

Junguk Cho , Department of Computer and Science and Engineering, University of California, San Diego, La Jolla, USA
Bridget Benson , Department of Computer and Science and Engineering, University of California, San Diego, La Jolla, USA
Ryan Kastner , Department of Computer and Science and Engineering, University of California, San Diego, La Jolla, USA
pp. 66-69

A multi-FPGA accelerator for radiation dose calculation in cancer treatment (Abstract)

Cedric X. Yu , Department of Radiation Oncology, University of Maryland School of Medicine, Baltimore, USA
Bo Zhou , Department of Computer Science and Engineering, University of Notre Dame, Indiana, USA
X. Sharon Hu , Department of Computer Science and Engineering, University of Notre Dame, Indiana, USA
Danny Z. Chen , Department of Computer Science and Engineering, University of Notre Dame, Indiana, USA
pp. 70-79

A reconfigurable beamformer for audio applications (Abstract)

Dimitris Theodoropoulos , Computer Engineering Laboratory, EEMCS, TU Delft, P.O. Box 5031, 2600 GA, The Netherlands
Georgi Kuzmanov , Computer Engineering Laboratory, EEMCS, TU Delft, P.O. Box 5031, 2600 GA, The Netherlands
Georgi Gaydadjiev , Computer Engineering Laboratory, EEMCS, TU Delft, P.O. Box 5031, 2600 GA, The Netherlands
pp. 80-87

Parade: A versatile parallel architecture for accelerating pulse train clustering (Abstract)

Dan Zhang , Computer Science and Engineering Department, University of Michigan - Ann Arbor, USA
Amin Ansari , Computer Science and Engineering Department, University of Michigan - Ann Arbor, USA
Scott Mahlke , Computer Science and Engineering Department, University of Michigan - Ann Arbor, USA
pp. 88-93

A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs (Abstract)

Tsuyoshi Hamada , Faculty of Engineering, Department of Computer and Information Sciences, Nagasaki University, Bunkyo-machi, 852-8521, Japan
Cheng Ling , Institute for Integrated Micro and Nano Systems, Joint Research Institute for Integrated Systems, The University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
Khaled Benkrid , Institute for Integrated Micro and Nano Systems, Joint Research Institute for Integrated Systems, The University of Edinburgh, The King's Buildings, Mayfield Road, EH9 3JL, UK
pp. 94-100

Dynamic and application-driven I-cache partitioning for low-power embedded multitasking (Abstract)

Mathew Paul , University of Maryland at College Park, ECE Department, USA
Peter Petrov , University of Maryland at College Park, ECE Department, USA
pp. 101-106

A hardware-software codesign strategy for Loop intensive applications (Abstract)

Yuanrui Zhang , Department of Computer Science and Engineering, The Pennsylvania State University, USA
Mahmut Kandemir , Department of Computer Science and Engineering, The Pennsylvania State University, USA
pp. 107-113

Introducing control-flow inclusion to support pipelining in custom instruction set extensions (Abstract)

Theo Kluter , Ecole Polytechnique Fédérale de Lausanne (EPFL), School of Computer and Communication Sciences, CH-1015, Switzerland
Paolo Ienne , Ecole Polytechnique Fédérale de Lausanne (EPFL), School of Computer and Communication Sciences, CH-1015, Switzerland
Nigel Topham , University of Edinburgh, School of Informatics, Institute for Computing Systems Architecture, UK
Philip Brisk , Ecole Polytechnique Fédérale de Lausanne (EPFL), School of Computer and Communication Sciences, CH-1015, Switzerland
Marcela Zuluaga , University of Edinburgh, School of Informatics, Institute for Computing Systems Architecture, UK
pp. 114-121
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