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Application Specific Processors, Symposium on (2008)
Anaheim, CA, USA
June 8, 2008 to June 9, 2008
ISBN: 978-1-4244-2333-0
TABLE OF CONTENTS
Papers

Custom Processor Core Construction from C Code (Abstract)

Jelena Trajkovic , Center for Embedded Computer Systems, University of California, Irvine. Email: jelenat@cecs.uci.edu
Daniel D. Gajski , Center for Embedded Computer Systems, University of California, Irvine. Email: gajski@cecs.uci.edu
pp. 1-6

Resource Sharing in Custom Instruction Set Extensions (Abstract)

Marcela Zuluaga , Institute for Computing Systems Architecture, School of Informatics, University of Edinburgh. g.m.zuluaga@sms.ed.ac.uk
Nigel Topham , Institute for Computing Systems Architecture, School of Informatics, University of Edinburgh. npt@inf.ed.ac.uk
pp. 7-13

Custom Instruction Generation with High-Level Synthesis (Abstract)

Masahiro Fujita , VLSI Design and Education Center, University of Tokyo. Email: fujita@ee.t.u-tokyo.ac.jp
Kenshu Seto , Dept. of Electrical and Electronic Engineering, Musashi Institute of Technology. Email: seto@ee.musashi-tech.ac.jp
pp. 14-19

Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor (Abstract)

Deming Chen , Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign. dchen@uiuc.edu
Wne-Mei Hwu , Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign. w-hwu@uiuc.edu
Alexandros Papakonstantinou , Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign. apapako2@uiuc.edu
pp. 20-25

Design and Architectural Exploration of Expression-Grained Reconfigurable Arrays (Abstract)

Giovanni Ansaloni , Faculty of Informatics, University of Lugano, 6900 Lugano, Switzerland. giovanni.ansaloni@lu.unisi.ch
Paolo Bonzini , Faculty of Informatics, University of Lugano, 6900 Lugano, Switzerland. paolo.bonzini@lu.unisi.ch
Laura Pozzi , Faculty of Informatics, University of Lugano, 6900 Lugano, Switzerland. laura.pozzi@lu.unisi.ch
pp. 26-33

Retargeting, Evaluating, and Generating Reconfigurable Array-Based Architectures (Abstract)

Jurgen Becker , Institut für Technik der Informationsverarbeitung (ITIV), Universität Karlsruhe (TH), Karlsruhe, Germany. becker@itiv.uni-karlsruhe.de
Carlos Morra , Institut für Technik der Informationsverarbeitung (ITIV), Universität Karlsruhe (TH), Karlsruhe, Germany. morra@itiv.uni-karlsruhe.de
Joao M. P. Cardoso , UTL/IST, Department of Computer Science and Engineering, Lisbon, Portugal; INESC-ID, 1000-029, Lisbon, Portugal. jmpc@acm.org
Joao Bispo , UTL/IST, Department of Computer Science and Engineering, Lisbon, Portugal; INESC-ID, 1000-029, Lisbon, Portugal
pp. 34-41

An FPGA Design Space Exploration Tool for Matrix Inversion Architectures (Abstract)

Bridget Benson , Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA 92093. blbenson@cs.ucsd.edu
Ali Irturk , Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA 92093. airturk@cs.ucsd.edu
Ryan Kastner , Department of Computer Science and Engineering, University of California, San Diego, La Jolla, CA 92093. kastner@cs.ucsd.edu
Shahnam Mirzaei , Department of Electrical and Computer Engineering, University of California, Santa Barbara, Santa Barbara, CA 93106. shahnam@umail.ucsb.edu
pp. 42-47

Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking (Abstract)

Timo Vogt , Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany
Sacha Loitz , Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany. email: loitz@eit.uni-kl.de
Christian Brehm , Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany
Norbert Wehn , Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany
Markus Wedler , Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany
Wolfgang Kunz , Department of Electrical and Computer Engineering, University of Kaiserslautern, Germany
pp. 48-54

Extensible On-Chip Peripherals (Abstract)

Richard Neil Pittman , Microsoft Research. pittman@microsoft.com
Bharat Sukhwani , Boston University. bharats@bu.edu
Alessandro Forin , Microsoft Research. sandrof@microsoft.com
pp. 55-62

Thermal-aware Design Considerations for Application-Specific Instruction Set Processor (Abstract)

Guangyu Sun , Dept. of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802. E-mail: gsun@cse.psu.edu
Yuan Xie , Dept. of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802. E-mail: yuanxie@cse.psu.edu
Yunsi Fei , Dept. of Electrical&Computer Engineering, University of Connecticut, Storrs, CT 06269. E-mail: yfei@engr.uconn.edu
Hai Lin , Dept. of Electrical&Computer Engineering, University of Connecticut, Storrs, CT 06269. E-mail: hal06002@engr.uconn.edu
Anand Sivasubramaniam , Dept. of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802. E-mail: anand@cse.psu.edu
pp. 63-68

Application Specific Low Latency Instruction Cache for NAND Flash Memory Based Embedded Systems (Abstract)

Kwangyoon Lee , Department of Computer Science and Engineering, University of California, San Diego. kwl002@cs.ucsd.edu
Alex Orailoglu , Department of Computer Science and Engineering, University of California, San Diego. alex@cs.ucsd.edu
pp. 69-74

An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints (Abstract)

Cristina Silvano , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Via Ponzio 34/5, 20133 Milano - Italy. E-mail: silvano@elet.polimi.it
Gianluca Palermo , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Via Ponzio 34/5, 20133 Milano - Italy. E-mail: gpalermo@elet.polimi.it
Vittorio Zaccaria , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Via Ponzio 34/5, 20133 Milano - Italy. E-mail: zaccaria@elet.polimi.it
pp. 75-82

AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications (Abstract)

Masanori Muroyama , System LSI Research Center, Kyushu University, 3-8-33, Momochihama, Sawara-ku, Fukuoka, 814-0001 JAPAN. muroyama@slrc.kyushu-u.ac.jp
Yuriko Ishitobi , Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka, 819-0395 JAPAN. ishitobi@c.csce.kyushu-u.ac.jp
Tohru Ishihara , System LSI Research Center, Kyushu University, 3-8-33, Momochihama, Sawara-ku, Fukuoka, 814-0001 JAPAN. ishihara@slrc.kyushu-u.ac.jp
Yuji Kunitake , Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka, 819-0395 JAPAN. y-kunitake@c.csce.kyushu-u.ac.jp
Toshinori Sato , System LSI Research Center, Kyushu University, 3-8-33, Momochihama, Sawara-ku, Fukuoka, 814-0001 JAPAN. tsato@slrc.kyushu-u.ac.jp
Yuichiro Oyama , Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka, 819-0395 JAPAN. yuichiro@c.csce.kyushu-u.ac.jp
Yusuke Kaneda , Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka, 819-0395 JAPAN. kaneda@c.csce.kyushu-u.ac.jp
Seiichiro Yamaguchi , Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka, 819-0395 JAPAN. seiichiro@c.csce.kyushu-u.ac.jp
Tadayuki Matsumura , Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka, 819-0395 JAPAN. matsumura@c.csce.kyushu-u.ac.jp
pp. 83-88

System-Level Performance Estimation for Application-Specific MPSoC Interconnect Synthesis (Abstract)

Matin Hashemi , Electrical and Computer Engineering, University of California, Davis, CA 95616, USA. hashemi@ucdavis.edu
Soheil Ghiasi , Electrical and Computer Engineering, University of California, Davis, CA 95616, USA. ghiasi@ucdavis.edu
Po-Kuan Huang , Electrical and Computer Engineering, University of California, Davis, CA 95616, USA. pohuang@ucdavis.edu
pp. 95-100

Accelerating Compute-Intensive Applications with GPUs and FPGAs (Abstract)

Jie Li , Department of Electrical and Computer Engineering, University of Virginia. jl3yh@virginia.edu
Shuai Che , Department of Computer Science, University of Virginia. sc5nf@virginia.edu
John Lach , Department of Electrical and Computer Engineering, University of Virginia. jlach@virginia.edu
Jeremy W. Sheaffer , Department of Computer Science, University of Virginia. jws9c@virginia.edu
Kevin Skadron , Department of Computer Science, University of Virginia; NVIDIA Research. skadron@virginia.edu
pp. 101-107

TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing (Abstract)

Erik Brunvand , School of Computing, University of Utah, Salt Lake City, UT 84112
Daniel Kopta , School of Computing, University of Utah, Salt Lake City, UT 84112
Solomon Boulos , School of Computing, University of Utah, Salt Lake City, UT 84112
Josef Spjut , School of Computing, University of Utah, Salt Lake City, UT 84112
Spencer Kellis , School of Computing, University of Utah, Salt Lake City, UT 84112
pp. 108-114

Multi-core Architectures with Dynamically Reconfigurable Array Processors for the WiMAX Physical Layer (Abstract)

Wei Han , School of Engineering and Electronics, University of Edinburgh, The King's Buildings, Mayfield Road, Edinburgh, EH9 3JL, UK. Tel: (+44)131 650 5619 Email: w.han@ed.ac.uk
Ahmet T. Edorgan , School of Engineering and Electronics, University of Edinburgh, The King's Buildings, Mayfield Road, Edinburgh, EH9 3JL, UK
Ioannis Nousias , School of Engineering and Electronics, University of Edinburgh, The King's Buildings, Mayfield Road, Edinburgh, EH9 3JL, UK
Ying Yi , School of Engineering and Electronics, University of Edinburgh, The King's Buildings, Mayfield Road, Edinburgh, EH9 3JL, UK
Tughrul Arslan , School of Engineering and Electronics, University of Edinburgh, The King's Buildings, Mayfield Road, Edinburgh, EH9 3JL, UK
Mark Muir , School of Engineering and Electronics, University of Edinburgh, The King's Buildings, Mayfield Road, Edinburgh, EH9 3JL, UK
pp. 115-120

An MDCT Hardware Accelerator for MP3 Audio (Abstract)

Xingdong Dai , LSI Corporation, 1110 American Parkway NE, Allentown, PA 18109. xingdong.dai@lsi.com
Meghanad D. Wagh , Dept. of ECE, Lehigh University, Bethlehem, PA 18015. mdw0@lehigh.edu
pp. 121-125
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