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2014 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS) (2014)
Berlin, Germany
April 15, 2014 to April 17, 2014
ISSN: 1080-1812
ISBN: 978-1-4799-4691-4
TABLE OF CONTENTS

Table of contents (PDF)

pp. v-viii

Organizers (PDF)

pp. xi

The Multi-Resource Server for predictable execution on multi-core platforms (Abstract)

Rafia Inam , Mälardalen Real-Time Research Centre, Mälardalen University, Västerås, Sweden
Nesredin Mahmud , Mälardalen Real-Time Research Centre, Mälardalen University, Västerås, Sweden
Moris Behnam , Mälardalen Real-Time Research Centre, Mälardalen University, Västerås, Sweden
Thomas Nolte , Mälardalen Real-Time Research Centre, Mälardalen University, Västerås, Sweden
Mikael Sjodin , Mälardalen Real-Time Research Centre, Mälardalen University, Västerås, Sweden
pp. 1-12

Towards certifiable adaptive reservations for hypervisor-based virtualization (Abstract)

Stefan Groesbrink , Heinz Nixdorf Institute, University of Paderborn, Germany
Luis Almeida , IT - Faculty of Engineering, University of Porto, Portugal
Mario de Sousa , INESC TEC (formerly INESC Porto), University of Porto, Portugal
Stefan M. Petters , CISTER/INESC-TEC, ISEP, IPP, Porto, Portugal
pp. 13-24

FJOS: Practical, predictable, and efficient system support for fork/join parallelism (Abstract)

Qi Wang , The George Washington University, DC, USA
Gabriel Parmer , The George Washington University, DC, USA
pp. 25-36

SAFER SLOTH: Efficient, hardware-tailored memory protection (Abstract)

Daniel Danner , Friedrich-Alexander-Universität (FAU) Erlangen-Nürnberg, Germany
Rainer Muller , Friedrich-Alexander-Universität (FAU) Erlangen-Nürnberg, Germany
Wolfgang Schroder-Preikschat , Friedrich-Alexander-Universität (FAU) Erlangen-Nürnberg, Germany
Wanja Hofer , Friedrich-Alexander-Universität (FAU) Erlangen-Nürnberg, Germany
Daniel Lohmann , Friedrich-Alexander-Universität (FAU) Erlangen-Nürnberg, Germany
pp. 37-48

Schedulability tests for tasks with Variable Rate-dependent Behaviour under fixed priority scheduling (Abstract)

Robert I. Davis , Real-Time Systems Research Group, University of York, UK
Timo Feld , Institute of Embedded Systems / Real-Time Systems, Ulm University, Germany
Victor Pollex , Institute of Embedded Systems / Real-Time Systems, Ulm University, Germany
Frank Slomka , Institute of Embedded Systems / Real-Time Systems, Ulm University, Germany
pp. 51-62

Real-time scheduling under fault bursts with multiple recovery strategy (Abstract)

Mohammad A Haque , Department of Computer Science, George Mason University, Fairfax, Virginia 22030, USA
Hakan Aydin , Department of Computer Science, George Mason University, Fairfax, Virginia 22030, USA
Dakai Zhu , Department of Computer Science, University of Texas at San Antonio, 78249, USA
pp. 63-74

Hiding memory latency using fixed priority scheduling (Abstract)

Saud Wasly , University of Waterloo, Canada
Rodolfo Pellizzoni , University of Waterloo, Canada
pp. 75-86

Relaxing the synchronous approach for mixed-criticality systems (Abstract)

Eugene Yip , Department of ECE, University of Auckland, New Zealand
Matthew M Y Kuo , Department of ECE, University of Auckland, New Zealand
Partha S Roop , Department of ECE, University of Auckland, New Zealand
David Broman , UC Berkeley, USA
pp. 89-100

FlexPRET: A processor platform for mixed-criticality systems (Abstract)

Michael Zimmer , University of California, Berkeley, USA
David Broman , University of California, Berkeley, USA
Chris Shaver , University of California, Berkeley, USA
Edward A. Lee , University of California, Berkeley, USA
pp. 101-110

Partitioned scheduling of multi-modal mixed-criticality real-time systems on multiprocessor platforms (Abstract)

Dionisio de Niz , SEI, Carnegie Mellon University, USA
Linh T.X. Phan , University of Pennsylvania, USA
pp. 111-122

Precise shared cache analysis using optimal interference placement (Abstract)

Kartik Nagar , Dept. of Computer Science and Automation, Indian Institute of Science, Bangalore, India
Y.N. Srikant , Dept. of Computer Science and Automation, Indian Institute of Science, Bangalore, India
pp. 125-134

Selfish-LRU: Preemption-aware caching for predictability and performance (Abstract)

Jan Reineke , Saarland University, Saarbrücken, Germany
Sebastian Altmeyer , University of Amsterdam, Netherlands
Daniel Grund , Thales Germany, Business Unit Transportation Systems, Germany
Sebastian Hahn , Saarland University, Saarbrücken, Germany
Claire Maiza , INP Grenoble, Verimag, France
pp. 135-144

Bounding memory interference delay in COTS-based multi-core systems (Abstract)

Hyoseung Kim , Electrical and Computer Engineering, Carnegie Mellon University, USA
Dionisio de Niz , Software Engineering Institute, Carnegie Mellon University, USA
Bjorn Andersson , Software Engineering Institute, Carnegie Mellon University, USA
Mark Klein , Software Engineering Institute, Carnegie Mellon University, USA
Onur Mutlu , Electrical and Computer Engineering, Carnegie Mellon University, USA
Ragunathan Rajkumar , Electrical and Computer Engineering, Carnegie Mellon University, USA
pp. 145-154

PALLOC: DRAM bank-aware memory allocator for performance isolation on multicore platforms (Abstract)

Heechul Yun , University of Kansas, USA
Renato Mancuso , University of Illinois at Urbana-Champaign, USA
Zheng-Pei Wu , University of Waterloo, Canada
Rodolfo Pellizzoni , University of Waterloo, Canada
pp. 155-166

Trickle: Automated infeasible path detection using all minimal unsatisfiable subsets (Abstract)

Bernard Blackham , NICTA and University of New South Wales, Sydney, Australia
Mark Liffiton , Illinois Wesleyan University, Bloomington 61701, USA
Gernot Heiser , NICTA and University of New South Wales, Sydney, Australia
pp. 169-178

WCET-aware dynamic code management on scratchpads for Software-Managed Multicores (Abstract)

Yooseong Kim , University of California, Berkeley, USA
David Broman , University of California, Berkeley, USA
Jian Cai , Arizona State University, USA
Aviral Shrivastaval , University of California, Berkeley, USA
pp. 179-188

Architecture-parametric timing analysis (Abstract)

Jan Reineke , Department of Computer Science, Saarland University, Saarbrücken, Germany
Johannes Doerfert , Department of Computer Science, Saarland University, Saarbrücken, Germany
pp. 189-200

Slack-aware opportunistic monitoring for real-time systems (Abstract)

Daniel Lo , Cornell University, Ithaca, NY, USA
Mohamed Ismail , Cornell University, Ithaca, NY, USA
Tao Chen , Cornell University, Ithaca, NY, USA
G. Edward Suh , Cornell University, Ithaca, NY, USA
pp. 203-214

A network virtualization approach for performance isolation in controller area network (CAN) (Abstract)

Christian Herber , Technische Universität München - Institute for Integrated Systems, Munich, Germany
Andre Richter , Technische Universität München - Institute for Integrated Systems, Munich, Germany
Thomas Wild , Technische Universität München - Institute for Integrated Systems, Munich, Germany
Andreas Herkersdorf , Technische Universität München - Institute for Integrated Systems, Munich, Germany
pp. 215-224

AHRB: A high-performance time-composable AMBA AHB bus (Abstract)

Javier Jalle , Barcelona Supercomputing Center, Spain
Jaume Abella , Barcelona Supercomputing Center, Spain
Eduardo Quinones , Barcelona Supercomputing Center, Spain
Luca Fossati , European Space Agency, Netherlands
Marco Zulianello , European Space Agency, Netherlands
Francisco J. Cazorla , Barcelona Supercomputing Center, Spain
pp. 225-236

MAESTRO: A time-driven embedded testbed Architecture with Event-driven Synchronization (Abstract)

Sriram Karunagaran , Amrita Vishwa Vidyapeetham, Kollam, India
Karuna P. Sahoo , Amrita Vishwa Vidyapeetham, Kollam, India
Jayaraj Poroor , Amrita Vishwa Vidyapeetham, Kollam, India
Masahiro Fujita , VLSI Design and Education Center, The University of Tokyo, Japan
pp. 237-248

Overhead-aware temporal partitioning on multicore processors (Abstract)

Risat Mahmud Pathan , Chalmers University of Technology, Sweden
Per Stenstrom , Chalmers University of Technology, Sweden
Lars-Goran Green , RUAG Space Sweden AB, Göteborg, Sweden
Torbjorn Hult , RUAG Space Sweden AB, Göteborg, Sweden
Patrik Sandin , RUAG Space Sweden AB, Göteborg, Sweden
pp. 251-262

Scaling global scheduling with message passing (Abstract)

Felipe Cerqueira , Max Planck Institute for Software Systems (MPI-SWS), Germany
Manohar Vanga , Max Planck Institute for Software Systems (MPI-SWS), Germany
Bjorn B. Brandenburg , Max Planck Institute for Software Systems (MPI-SWS), Germany
pp. 263-274

Has energy surpassed timeliness? Scheduling energy-constrained mixed-criticality systems (Abstract)

Marcus Volp , School of Computer Science, Logical Systems Lab, Carnegie Mellon University, Pittsburgh, PA, USA
Marcus Hahnel , Institute for Systems Architecture, Operating Systems Group, Technische Universität Dresden, Germany
Adam Lackorzynski , Institute for Systems Architecture, Operating Systems Group, Technische Universität Dresden, Germany
pp. 275-284

Unifying DVFS and offlining in mobile multicores (Abstract)

Aaron Carroll , NICTA and UNSW, Sydney, Australia
Gernot Heiser , NICTA and UNSW, Sydney, Australia
pp. 287-296

STCoS: Software-defined traffic control for smartphones (Abstract)

Yoshikazu Watanabe , Knowledge Discovery Research Laboratories, NEC Corporation, Kanagawa, Japan
Shuichi Karino , Knowledge Discovery Research Laboratories, NEC Corporation, Kanagawa, Japan
Yoshinori Saida , Knowledge Discovery Research Laboratories, NEC Corporation, Kanagawa, Japan
Gen Morita , Knowledge Discovery Research Laboratories, NEC Corporation, Kanagawa, Japan
Takahiro Iihoshi , Knowledge Discovery Research Laboratories, NEC Corporation, Kanagawa, Japan
pp. 297-308

The ROSACE case study: From Simulink specification to multi/many-core execution (Abstract)

Claire Pagetti , ONERA - Toulouse, France
David Saussie , Polytechnique Montréal - Canada
Romain Gratia , ONERA - Toulouse, France
Eric Noulard , ONERA - Toulouse, France
Pierre Siron , ONERA - Toulouse, France
pp. 309-318
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