The Community for Technology Leaders
Rapid System Prototyping, IEEE International Workshop on (2009)
Paris, France
June 23, 2009 to June 26, 2009
ISSN: 1074-6005
ISBN: 978-0-7695-3690-3
pp: 88-94
The increasing complexity of system-on-chip design – especially the software part of those systems – has stimulated much research work on design space exploration at the early stages of system development. In this paper we propose a new methodology for system modeling based on a specific UML profile. It defines a high design abstraction level for modeling and analyzing hardware resource sharing between system elements. Additionally, a SystemC-based simulator is developed in order to simulate modeled systems and evaluate their performance. Due to the high level of abstraction, the developed simulator enables fast exploration of design solutions.First promising results are presented and discussed over a mobile platform for the 3GPP LTE protocol stack.

P. L. Moënner, A. Baghdadi, L. Apvrille, R. Pacalet, A. Kanstein and C. Jaber, "High-Level System Modeling for Rapid HW/SW Architecture Exploration," Rapid System Prototyping, IEEE International Workshop on(RSP), Paris, France, 2009, pp. 88-94.
95 ms
(Ver 3.3 (11022016))