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Rapid System Prototyping, IEEE International Workshop on (2005)
Montreal, Canada
June 8, 2005 to June 10, 2005
ISSN: 1074-6005
ISBN: 0-7695-2361-7
TABLE OF CONTENTS
Introduction
Introduction
Networks and Protocols

Synthesis of Communication Structures and Protocols in Distributed Embedded Systems (Abstract)

Stefan Ihmor , University of Paderborn
Wolfram Hardt , Chemnitz University of Technology
Tobias Loke , University of Paderborn
pp. 3-9

Heterogeneous Modelling of an Optical Network-on-Chip with SystemC (Abstract)

Fabien Mieyeville , Laboratory of Electronics Optoelectronics and Microsystems - Ecole Centrale de Lyon
Ian O?Connor , Laboratory of Electronics Optoelectronics and Microsystems - Ecole Centrale de Lyon
Matthieu Bri?re , Laboratory of Electronics Optoelectronics and Microsystems - Ecole Centrale de Lyon
Fr?d?ric Gaffiot , Laboratory of Electronics Optoelectronics and Microsystems - Ecole Centrale de Lyon
Emmanuel Drouard , Laboratory of Electronics Optoelectronics and Microsystems - Ecole Centrale de Lyon
David Navarro , Laboratory of Electronics Optoelectronics and Microsystems - Ecole Centrale de Lyon
pp. 10-16

Models for Embedded Application Mapping onto NoCs: Timing Analysis (Abstract)

Ney Calazans , Faculdade de Inform?tica
C?sar Marcon , Instituto de Inform?tica
M?rcio Kreutz , Instituto de Inform?tica
Altamiro Susin , Instituto de Inform?tica
pp. 17-23

Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2 (Abstract)

F. Clermidy , Conception and System Integration Department
A. A. Jerraya , System-Level Synthesis Group
R. Lemaire , Conception and System Integration Department
Y. Durand , Conception and System Integration Department
D. Lattard , Conception and System Integration Department
pp. 24-30
Tools for Rapid Prototyping

Leveraging Model Representations for System Level Design Tools (Abstract)

El Mostapha Aboulhamid , Universit? de Montr?al
Gabriela Nicolescu , Ecole Polytechnique de Montr?al
James Lapalme , Universit? de Montr?al
pp. 33-39

Porting DSP Applications across Design Tools Using the Dataflow Interchange Format (Abstract)

Chia-Jui Hsu , University of Maryland at College Park
Shuvra S. Bhattacharyya , University of Maryland at College Park
pp. 40-46

High Level Synthesis for Data-Driven Applications (Abstract)

Etienne Bergeron , Universit? de Montr?al
Jean Pierre David , Universit? de Montr?al
Marc Feeley , Universit? de Montr?al
Xavier Saint-Mleux , Universit? de Montr?al
pp. 54-60
FPGAs for Rapid Prototyping

Dynamic Reconfiguration of IP-Based Systems (Abstract)

Markus Visarius , Chemnitz University of Technology
Wolfram Hardt , Chemnitz University of Technology
Andr? Meisel , Chemnitz University of Technology
Markus Scheithauer , Chemnitz University of Technology
pp. 70-76

Straight Method for Reallocation of Complex Cores by Dynamic Reconfiguration in Virtex II FPGAs (Abstract)

Teresa Riesgo , Universidad Polit?cnica de Madrid
Eduardo de la Torre , Universidad Polit?cnica de Madrid
Ana B. Jimeno , Universidad Polit?cnica de Madrid
Yana E. Krasteva , Universidad Polit?cnica de Madrid
pp. 77-83

A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices (Abstract)

Christophe Bobda , University of Erlangen-Nuremberg
J? Teich , University of Erlangen-Nuremberg
Mateusz Majer , University of Erlangen-Nuremberg
Jan C. van der Veen , Braunschweig University of Technology
Ji Ding , University of Erlangen-Nuremberg
S?ndor P. Fekete , Braunschweig University of Technology
Ali Ahmadinia , University of Erlangen-Nuremberg
pp. 84-90
Software Design and Prototyping

Simulation of Resolution of CS Problem for Multiple Common Variables in Multiprocessor Environment (Abstract)

M. Younus Javed , National University of Science and Technology
Ghulam Qader , National University of Science and Technology
pp. 93-98

Rapid Prototyping of Embedded Software Using Selective Formalism (Abstract)

W.B. Gardner , University of Guelph
John Carter , University of Guelph
Ming Xu , University of Guelph
pp. 99-104

Test-Time, Run-Time, and Simulation-Time Temporal Assertions in RSP (Abstract)

Man-Tak Shing , Naval Postgraduate School
Doron Drusinsky , Naval Postgraduate School
Kadir Demir , Naval Postgraduate School
pp. 105-110

Rapid Development Methodology for Customized Middleware (Abstract)

J?r?me Hugues , T?l?com Paris
Thomas Vergmaud , T?l?com Paris
Fabrice Kordon , Laboratoire d?Informatique de Paris
Laurent Pautet , T?l?com Paris
pp. 111-117
Applications

An 8-GHz Ultra Wideband Transceiver Prototyping Testbed (Abstract)

Deepak Argarwal , Virginia Polytechnic University
Christopher R. , Virginia Polytechnic University
Peter M. , Virginia Polytechnic University
pp. 121-127

Enabling a Real-Time Solution for Neuron Detection with Reconfigurable Hardware (Abstract)

Ben Cordes , Northeastern University
Miriam Leeser , Northeastern University
Jennifer Dy , Northeastern University
James Goebel , NeuralArts, Inc.
pp. 128-134

COMPASS?A Novel Concept of a Reconfigurable Platform for Automotive System Development and Test (Abstract)

C. Bieser , Institute for Information Processing Technology
K.-D. M?ller-Glaser , Institute for Information Processing Technology
pp. 135-140

Optimization of Memory Allocation for Real-Time Video Processing on FPGA (Abstract)

Mattias O?Nils , Mid-Sweden University
Leif Olsson , Mid-Sweden University
Benny Th?rnberg , Mid-Sweden University
pp. 141-147
Processor Design and Prototyping

Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems (Abstract)

Kugan Vivekanandarajah , Nanyang Technological University
Thambipillai Srikanthan , Nanyang Technological University
pp. 151-157

Performance Improvement of Multiprocessor Simulation by Optimizing Synchronization a Communication (Abstract)

Chong-Min Kyung , Korea Advanced Institute of Science and Technology
Heejun Shim , Korea Advanced Institute of Science and Technology
Moo-Kyoung Chung , Korea Advanced Institute of Science and Technology
pp. 158-164

Optimization Techniques for ADL-Driven RTL Processor Synthesis (Abstract)

Rainer Leupers , Institute for Integrated Signal Processing Systems
Oliver Schliebusch , Institute for Integrated Signal Processing Systems
Heinrich Meyr , Institute for Integrated Signal Processing Systems
Anupam Chattopadhyay , Institute for Integrated Signal Processing Systems
Ernst Martin Witte , Institute for Integrated Signal Processing Systems
David Kammler , Institute for Integrated Signal Processing Systems
Gerd Ascheid , Institute for Integrated Signal Processing Systems
pp. 165-171

Automated Floating-Point to Fixed-Point Conversion with the Fixify Environment (Abstract)

Markus Rupp , Vienna University of Technology
Pavle Belanovic , Vienna University of Technology
pp. 172-178
Testing Issues in Prototyping

Discrete-Continuous Simulation Model for Accurate Validation in Component-Based Heterogeneous SoC Design (Abstract)

M. Abid , Montreal University
G. Nicolescu , Polytechnique Montr?al
F. Bouchhima , Polytechnique Montr?al
M. Aboulhamid , Montreal University
pp. 181-187

Test Automation and Safety Assessment in Rapid Systems Prototyping (Abstract)

James Bret Michael , Naval Postgraduate School
Man-Tak Shing , Naval Postgraduate School
Mikhail Auguston , Naval Postgraduate School
pp. 188-194

A Test Language for CO-OPN Specifications (Abstract)

Luis Pedro , University of Geneva
Didier Buchs , University of Geneva
Levi L? , University of Geneva
pp. 195-201
Co-Design I

The Ordering of Events in a Prototyping Platform (Abstract)

Silvio Dragone , IBM Research GmbH
Clemens Lombriser , Swiss Federal Institute of Technology
pp. 211-217

Modeling and Prototyping of Communication Systems Using Java: A Case Study (Abstract)

Romualdo Begale Prud?ncio , Microelectronic Systems Institute
Manfred Glesner , Microelectronic Systems Institute
pp. 225-231
Co-Design II

A C/C++-Based Functional Verification Framework Using the SystemC Verification Library (Abstract)

Sanggyu Park , Seoul National University
Soo-Ik Chae , Seoul National University
pp. 237-239

An Approach for Functional Decomposition Applied to State-Based Designs (Abstract)

D. R. Avresky , Northeastern University
Luke Demoracski , Northeastern University
pp. 243-245

Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications (Abstract)

Kees Vissers , Xilinx Research Labs
Bart Vanhoof , Interuniversity Microelectronic Center (IMEC)
Paul Schumacher , Xilinx Research Labs
Adrian Chirila-Rus , Interuniversity Microelectronic Center (IMEC)
Kristof Denolf , Interuniversity Microelectronic Center (IMEC)
pp. 246-249

Thread-Level Parallel Execution in Co-Designed Virtual Machines (Abstract)

Kenneth B. Kent , University of New Brunswick
Thomas S. Hall , University of New Brunswick
pp. 249-251
Hardware Prototyping

Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units (Abstract)

Luciano Agostini , Instituto de Inform?tica
Sergio Bampi , Instituto de Inform?tica
Flavio Wagner , Instituto de Inform?tica
Arnaldo Azevedo , Instituto de Inform?tica
pp. 255-257

SyCE: An Integrated Environment for System Design in SystemC (Abstract)

Rolf Drechsler , University of Bremen
Daniel Gro?e , University of Bremen
Christian Genz , University of Bremen
Görschwin Fey , University of Bremen
pp. 258-260

KoVer: A Sophisticated Residue Arithmetic Core Generator (Abstract)

H. T. Vergos , University of Patras
Nikolaos Kostaras , University of Patras
pp. 261-263

A HyperTransport Chip-to-Chip Interconnect Tunnel Developed Using SystemC (Abstract)

Yvon Savaria , ?cole Polytechnique de Montr?al
Ami Castonguay , ?cole Polytechnique de Montr?al
pp. 264-266

Prototyping a Residential Gateway Using Xilinx ISE (Abstract)

J. D. Zheng , University of Guelph
S. W. Song , Wilfrid Laurier University
W. B. Gardner , University of Guelph
pp. 267-269
Author Index

Author Index (PDF)

pp. 271-272
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