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Rapid System Prototyping, IEEE International Workshop on (2003)
San Diego, California, USA
June 9, 2003 to June 11, 2003
ISSN: 1074-6005
ISBN: 0-7695-1943-1
TABLE OF CONTENTS
Introduction
Session 1: Design Environments I

A Universal Low Cost Run-Time and Programming Environment for Reconfigurable Computing (Abstract)

Apostolos Dollas , Technical University of Crete
Dionissios Efstathiou , Technical University of Crete
Thomas Kyriakides , Technical University of Crete
pp. 2

A Component-Based Methodology for Embedded System Prototyping (Abstract)

Patrick Tessier , CEA Saclay
Chokri Mraidha , CEA Saclay
Jean-Marc Geib , Universit? des Sciences et Technologies de Lille
S?bastien G?rard , CEA Saclay
pp. 9

i-CAD: A Rapid Prototyping CAD Tool for Intranet Design (Abstract)

Alice C. Parker , University of Southern California
Sami J. Habib , Kuwait University
pp. 16
Session 2: Embedded Systems

A New Specification Methodology for Embedded Systems Based on the - Calculus Process Algebra (Abstract)

B. Balser , EADS Military Aircraft, New Avionics Structures, 81663 Munich, Germany
D. Monjau , Chemnitz University of Technology, DCS, 09107 Chemnitz, Germany
M. Fischer , EADS Military Aircraft, New Avionics Structures, 81663 Munich, Germany/Chemnitz University of Technology, DCS, 09107 Chemnitz, Germany
S. Forster , EADS Military Aircraft, New Avionics Structures, 81663 Munich, Germany/Chemnitz University of Technology, DCS, 09107 Chemnitz, Germany
A. Windisch , EADS Military Aircraft, New Avionics Structures, 81663 Munich, Germany
pp. 26

Embedded Application Prototyping on a Communication-Restricted Reconfigurable (Abstract)

Arif Sasongko , SLS Group, TIMA Laboratory,
Ahmed Amine Jerraya , SLS Group, TIMA Laboratory,
Amer Baghdadi , SLS Group, TIMA Laboratory,
Frederic Rousseau , SLS Group, TIMA Laboratory,
pp. 33

Efficient Analysis of Mixed-Signal ASICs for Smart Sensors (Abstract)

Nikolaus E. Ker? , Vienna University of Technology
Thilo Sauter , Vienna University of Technology
pp. 40

Verification of Timing Properties in Rapid System Prototyping (Abstract)

Doron Drusinky , Naval Postgraduate School
Man-Tak Shing , Naval Postgraduate School
pp. 47
Session 3: Signal Processing and ASIC Design

Simulation and Analysis of Embedded DSP Systems Using Petri Nets (Abstract)

Abhijit K. Deb , Royal Institute of Technology, 164 40 Kista, Sweden
Johnny ?berg , Royal Institute of Technology, 164 40 Kista, Sweden
Axel Jantsch , Royal Institute of Technology, 164 40 Kista, Sweden
pp. 64

A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture (Abstract)

Thomas Lehmann , University of Paderborn, Paderborn / Germany
Mauro Zanella , University of Paderborn, Paderborn / Germany
Christophe Bobda , University of Paderborn, Paderborn / Germany
Achim Rettberg , University of Paderborn, Paderborn / Germany
pp. 71

Prototype-Based Tests for Hybrid Reactive Systems (Abstract)

T. Stauner , Petuelring 116
J. Philipps , Validas Model Validation AG
A. Pretschner , Technische Universit?at M?unchen
pp. 78
Session 4: Applications

Synthesis of LOTOS Specification of the IEEE-1394 Firewire Protocol (Abstract)

Michele Malgeri , Facolta? di Ingegneria - Universita? di Catania
Vincenza Carchiolo , Facolta? di Ingegneria - Universita? di Catania
Giuseppe Mangioni , Facolta? di Ingegneria - Universita? di Catania
pp. 86
Session 5: Run-time Environments and Middleware

Evaluation of Middleware Architectures in Achieving System Interoperability (Abstract)

Valdis Berzins , Naval Postgraduate School
Nabendu Chaki , Naval Postgraduate School
Luqi , Naval Postgraduate School
Paul Young , United States Naval Academy
pp. 108

A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation (Abstract)

Peter M. Athanas , Virginia Polytechnic Institute and State University
Scott J. Harper , Virginia Polytechnic Institute and State University
Ryan J. Fong , Virginia Polytechnic Institute and State University
pp. 117

Contributions to middleware architectures to prototype distribution infrastructures (Abstract)

J?r?me Hugues , CS & Networks Department
Laurent Pautet , CS & Networks Department
Fabrice Kordon , Université Pierre & Marie Curie
pp. 124
Session 6: Communications I

Design and Prototyping a Fast Hadamard Transformer for WCDMA (Abstract)

Sanat Kamal Bahl , University of Maryland Baltimore County
pp. 134

The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures (Abstract)

L. D. Kabulepa , Institute of Microelectronic Systems
T. Pionteck , Institute of Microelectronic Systems
M. Glesner , Institute of Microelectronic Systems
A. Garcia , Institute of Microelectronic Systems
pp. 141

Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment (Abstract)

Robert W. Brodersen , University of California, Berkeley
Chen Chang , University of California, Berkeley
Allen Chen , University of California, Berkeley
Kimmo Kuusilinna , Tampere University of Technology
Nathan Chan , University of California, Berkeley
Borivoje Nikoli? , University of California, Berkeley
Brian Richards , University of California, Berkeley
pp. 148
Session 7: Modeling for Design I

An Instruction Throughput Model of Superscalar Processors (Abstract)

D. Scott Wills , Georgia Institute of Technology
Tarek M. Taha , Georgia Institute of Technology
pp. 156

Cache Configuration Exploration on Prototyping Platforms (Abstract)

Chuanjun Zhang , University of California, Riverside
Frank Vahid , University of California, Riverside
pp. 164
Session 8: Communications II

Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems (Abstract)

Alberto Garcia Ortiz , Darmstadt University of Technology
Juan Jesus , Darmstadt University of Technology
Tudor Murgan , Darmstadt University of Technology
Ocampo Hidalgo , Darmstadt University of Technology
Ralf Ludewig , Darmstadt University of Technology
Manfred Glesner , Darmstadt University of Technology
pp. 172

Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA (Abstract)

Joseph R. Cavallaro , Rice University
Yuanbin Guo , Nokia Research Center
Dennis McCain , Nokia Research Center
Gang Xu , Nokia Research Center
pp. 179

Rapid Prototyping of Real-Time Communication---A Case Study: Interacting Robots (Abstract)

M. Visarius , Informatik- und Prozess Labor (IPL), University of Paderborn,
R. Cardoso Klein , Informatik- und Prozess Labor (IPL), University of Paderborn,
W. Hardt , Informatik- und Prozess Labor (IPL), University of Paderborn,
S. Ihmor , Informatik- und Prozess Labor (IPL), University of Paderborn,
N. Bastos Jr. , Informatik- und Prozess Labor (IPL), University of Paderborn,
pp. 186
Session 9: Design Environments II

xDSL Systems Prototyping using a Flexible Emulation Environment (Abstract)

Nikolaos Papandreou , Computers Technology Institute
Theodore Antonakopoulos , University of Patras
Maria Varsamou , University of Patras
pp. 194

Rapid Prototyping and Incremental Evolution Using SLAM (Abstract)

Angel Herranz , Universidad Politecnica de Madrid
Juan Jos?e Moreno-Navarro , Universidad Politecnica de Madrid
pp. 201
Session 10: Modeling for Design II

Comparative Rapid Prototyping, A Case Study (Abstract)

V. Berzins , Naval Postgraduate School
Luqi , Naval Postgraduate School
M. Brown , Naval Postgraduate School
J. Puett , Naval Postgraduate School
W. Ray , Naval Postgraduate School
Y. Qiao , Naval Postgraduate School
D. Flood , Naval Postgraduate School
Z. Guan , Naval Postgraduate School
M. Shing , Naval Postgraduate School
L. Zhang , Naval Postgraduate School
N. Chaki , Naval Postgraduate School
X. Liang , Naval Postgraduate School
pp. 210

Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models (Abstract)

Nikil Dutt , Center for Embedded Computer Systems, University of California, Irvine, CA 92697, USA
Prabhat Mishra , Center for Embedded Computer Systems, University of California, Irvine, CA 92697, USA
Arun Kejariwal , Center for Embedded Computer Systems, University of California, Irvine, CA 92697, USA
pp. 226

Exploring the Probabilistic Design Space of Multimedia Systems (Abstract)

Shaoxiong Hua , University of Maryland, College Park, MD 20742, USA
Gang Qu , University of Maryland, College Park, MD 20742, USA
Shuvra S. Bhattacharyya , University of Maryland, College Park, MD 20742, USA
pp. 233
Author Index

Author Index (PDF)

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