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Rapid System Prototyping, IEEE International Workshop on (2001)
Monterey, California
June 25, 2001 to June 27, 2001
ISBN: 0-7695-1206-2
TABLE OF CONTENTS

Introduction (PDF)

pp. ix
Keynote Speakers

Rapid Prototyping of Computer Systems: Experiences and Lessons (Abstract)

Asim Smailagic , Carnegie Mellon University
Daniel P. Siewiorek , Carnegie Mellon University
Daniel Salber , IBM T.J. Watson Center
pp. 0002
Session 1: Hardware Case Studies

System Level Prototyping for Embedded Networking Applications (Abstract)

Andreas Doederlein , TU Wien/ICT
Atsushi Murase , Coactive Networks Inc.
Dietmar Loy , Coactive Networks Inc.
pp. 0012

Rapid Prototyping of a Reusable 4x4 Active ATM Switch Core with the PCI Pamette (Abstract)

Dionisios Pnevmatikatos , Technical University of Crete
Stamatios Kavvadias , Technical University of Crete
Euripides Sotiriades , Technical University of Crete
Nikolaos Aslanides , Technical University of Crete
Apostolos Dollas , Technical University of Crete
Kyprianos Papademetriou , Technical University of Crete
pp. 0017

Rapid Prototyping for Hardware Accelerated Elliptic Curve Public-Key Cryptosystems (Abstract)

S.A. Huss , Darmstadt University of Technology
M. Ernst , Darmstadt University of Technology
S. Klupsch , Darmstadt University of Technology
O. Hauck , Darmstadt University of Technology
pp. 0024
Session 2: Reconfigurable Computing

Singular Value Decomposition on Distributed Reconfigurable Systems (Abstract)

Chistophe Bobda , Paderborn University, Heinz Nixdorf Institute
Nils Steenbock , Paderborn University, Heinz Nixdorf Institute
pp. 0038

Determining the Optimum Extended Instruction-Set Architecture for Application Specific Reconfigurable VLIW CPUs (Abstract)

C. Alippi , Politecnico di Milano
L. Pozzi , Politecnico di Milano
W. Fornaciari , Politecnico di Milano
M. Sami , Politecnico di Milano
pp. 0050
Session 3: Communication Systems

Prototyping of Efficient Hardware Algorithms for Data Compression in Future Communication Systems (Abstract)

J. Becker , Institute of Microelectronic Systems, Darmstadt University of Technology
A. Friebe , Institute of Microelectronic Systems, Darmstadt University of Technology
C. Habermann , Institute of Microelectronic Systems, Darmstadt University of Technology
M. Glesner , Institute of Microelectronic Systems, Darmstadt University of Technology
A. Mukherjee , University of Central Florida
N. Motgi , University of Central Florida
pp. 0058

Rapid Prototyping of Automotive Communication Protocols (Abstract)

Thilo Demmeler , Bayerische Motoren Werke AG
Barry O'Rourke , Cadence Design Systems, Inc., Methodology Services Group
Steve Wisniewski , Cadence Design Systems, Inc., Methodology Services Group
Paolo Giusto , Cadence Design Systems, Inc., Systems and Functional Verification Group
pp. 0064

A Rapid Prototyping Methodology and Platform for Seamless Communication Systems (Abstract)

L. Machácek , Bournemouth University
P. Stepien , Bournemouth University
M. Vasilko , Bournemouth University
M. Matej , Bournemouth University
S. Holloway , Royal School of Signals
pp. 0070

A Tool Box to Map System Level Communications on HW/SW Architectures (Abstract)

Denis Hommais , Universit? Pierre et Marie Curie
Ivan Augé , Universit? Pierre et Marie Curie
Frédéric Pétrot , Universit? Pierre et Marie Curie
pp. 0077
Session 4: Distributed Prototyping

Object Model Driven Code Generation for the Enterprise (Abstract)

William J. Ray , SPAWAR Systems Center San Diego
pp. 0084

Distributed Prototyping from Validated Specifications (Abstract)

Rance Cleaveland , State University of New York at Stony Brook
Scott A. Smolka , State University of New York at Stony Brook
David Hansel , Reactive Systems
pp. 0097

DCAPS - Architecture for Distributed Computer Aided Prototyping System (Abstract)

M. Shing , Naval Postgraduate School
B. Bryant , Naval Postgraduate School
V. Berzins , Naval Postgraduate School
Luqi , Naval Postgraduate School
M. Auguston , Naval Postgraduate School
J. Ge , Naval Postgraduate School
B. Kin , Naval Postgraduate School
pp. 0103
Session 5: Systems Modeling

Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design (Abstract)

W.O. Cesário , TIMA Laboratory
G. Nicolescu , TIMA Laboratory
A.A. Jerraya , TIMA Laboratory
D. Lyonnard , TIMA Laboratory
L. Gauthier , TIMA Laboratory
pp. 0110

Rapid Application Development of Middleware Components by Using XML (Abstract)

Ralf-Dieter Schimkat , University of T?bingen
Gerd Nusser , University of T?bingen
pp. 0116

DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications (Abstract)

Sias Mostert , K.U.Leuven ESAT-ACCA
Nathalie Cossement , K.U.Leuven ESAT-ACCA
Rudy Lauwereins , K.U.Leuven ESAT-ACCA
Jef Van Meerbergen , Philips Research Laboratories
pp. 0122
Session 6: Model-based Prototyping

A Model-Based Tool for Interactive Prototyping of Highly Interactive Applications (Abstract)

Rémi Bastide , University Toulouse 1
Ousmane Sy , University Toulouse 1
David Navarre , University Toulouse 1
Philippe Palanque , University Toulouse 1
pp. 0136

From an Abstract Object-Oriented Model to a Ready-to-Use Embedded System Controller (Abstract)

Didier Buchs , Swiss Federal Institute of Technology
Stanislav Chachkov , Swiss Federal Institute of Technology
pp. 0142

Universal Object-Oriented Modeling for Rapid Prototyping of Embedded Electronic Systems (Abstract)

U. Dambacher , University of Karlsruhe
K.D. Müller-Glaser , University of Karlsruhe
M. Kühl , University of Karlsruhe
B. Spitzer , University of Karlsruhe
pp. 0149

Model Based Testing in Evolutionary Software Development (Abstract)

Alexander Pretschner , Technische Universit?t M?nchen
Heiko Lötzbeyer , Technische Universit?t M?nchen
Jan Philipps , Technische Universit?t M?nchen
pp. 0155
Session 7: Efficient Evaluation

Mixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints (Abstract)

Valentin Muresan , Dublin City University
Mircea Vladutiu , "Politehnica" University of Timisoara
Xiaojun Wang , Dublin City University
Valentina Muresan , "Politehnica" University of Timisoara
pp. 0162

An Approach to Mapping the Timing Behavior of VLSI Circuits on Emulators (Abstract)

Laurent Vuillemin , LIP6 - University of Paris 6
Pirouz Bazargan Sabet , LIP6 - University of Paris 6
pp. 0168

How Many CLBs Does Your Circuit Need to be Implemented? (Abstract)

Luiza de Macedo Mourelle , State University of Rio de Janeiro
Nadia Nedjah , State University of Rio de Janeiro
pp. 0174
Session 8: Methodologies and Tools

EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores (Abstract)

G. Ph. Alexiou , University of Patras
K. D. Adaos , University of Patras
D. Nikolos , University of Patras
D. Bakalis , University of Patras
D. Lymperopoulos , University of Patras
pp. 0182

Rapid Prototyping of Real-Time Control Laws for Complex Mechatronic Systems (Abstract)

M. Zanella , University of Paderborn
M. Deppe , University of Paderborn
Dr. Wolfram Hardt , University of Paderborn
M. Robrecht , University of Paderborn
pp. 0188

A Methodology for Architecture-Oriented Rapid Prototyping (Abstract)

M. Kühl , University of Karlsruhe
K.D. Müller-Glaser , University of Karlsruhe
B. Spitzer , University of Karlsruhe
pp. 0200

Author Index (PDF)

pp. 0206
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