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Rapid System Prototyping, IEEE International Workshop on (1999)
Clearwater, Florida
June 16, 1999 to June 18, 1999
ISSN: 1074-6005
ISBN: 0-7695-0246-6
TABLE OF CONTENTS

Introduction (PDF)

pp. viii
Keynote Presentation
Session 1: Communication and Distributed Systems: Chair: Fabrice Kordon, University of Paris, France

Rapid Prototyping of Formally Modelled Distributed Systems (Abstract)

Didier Buchs , Swiss Federal Institute of Technology
Mathieu Buffo , Swiss Federal Institute of Technology
pp. 4

System Design Validation Using Formal Models (Abstract)

Peter Henderson , University of Southampton
Robert Walters , University of Southampton
pp. 10

Communication Interface Synthesis for Multilanguage Specifications (Abstract)

F. Hessel , TIMA Laboratory
P. Coste , TIMA Laboratory
P. Lemarrec , TIMA Laboratory
N. Zergainoh , TIMA Laboratory
J.M. Daveau , TIMA Laboratory
A.A. Jerraya , TIMA Laboratory
pp. 15

Development of a Reusable E1 Transceiver Suitable for Rapid Prototyping (Abstract)

A. Vasilliou , University of Patras and Computer Technology Institute
K. Gounaris , University of Patras and Computer Technology Institute
K. Adaos , University of Patras and Computer Technology Institute
G. Alexiou , University of Patras and Computer Technology Institute
D. Nikolos , University of Patras and Computer Technology Institute
D. Mitsainas , INTRACOM S.A.
pp. 21
Session 2: Reconfigurable Architectures: Chair: Vijay Jain, University of South Florida, USA

First Steps towards a Reconfigurable Asynchronous System (Abstract)

Werner Erhard , University Jena
Andreas Reinsch , University Jena
Torsten Schober , University Jena
pp. 28

Rapid System Prototyping for High Performance Reconfigurable Computing (Abstract)

S. Shrivastava , University of South Florida
V.K. Jain , University of South Florida
pp. 32
Session 3: Reuse: Chair: Didier Buchs, Swiss Federal Institute of Technology, Switzerland

A Design and Tool Reuse Methodology for Rapid Prototyping of Application Specific Instruction Set Processors (Abstract)

Young Geol Kim , Korea Advanced Institute of Science and Technology
Tag Gon Kim , Korea Advanced Institute of Science and Technology
pp. 46

Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering and Re-Use (Abstract)

David Landis , Pennsylvania State University
Praveen Guddeti , Pennsylvania State University
Paul Hulina , Pennsylvania State University
Lee Coraor , Pennsylvania State University
pp. 52
Session 4: Formal Methods: Chair: Didier Buchs, Swiss Federal Institute of Technology, Switzerland

Rapid Prototyping of Specification Language Implementations (Abstract)

Martin Leucker , Aachen University of Technology
Thomas Noll , Aachen University of Technology
pp. 60

A Methodological Approach to Implement CSP on FPGA (Abstract)

Zineb Habbas , University of Metz
Francine Herrmann , University of Metz
Daniel Singer , University of Metz
Michaël Krajecki , Loria, projet RESEDAS
pp. 66
Session 5: CASE Studies: Chair: Manfred Glesner, Darmstadt University of Technology, Germany

Transformations of a 3D Image Reconstruction Algorithm for Data Transfer and Storage Optimization (Abstract)

Tanja Van Achteren , KULeuven - ESAT/ACCA
Marleen Adé , KULeuven - ESAT/ACCA
Rudy Lauwereins , KULeuven - ESAT/ACCA
Marc Proesmans , KULeuven - ESAT/ACCA
Luc Van Gool , KULeuven - ESAT/ACCA
Jan Bormans , KULeuven - ESAT/ACCA
Francky Catthoor , KULeuven - ESAT/ACCA
pp. 81

Fast Prototyping: A Case Study the Jpeg Compression Algorithm (Abstract)

S. Pillement , Universit? Montpellier II
L. Torres , Universit? Montpellier II
M. Robert , Universit? Montpellier II
G. Cambon , Universit? Montpellier II
pp. 87
Session 6: Special Session: Rapid Prototyping of Embedded Systems with Hard Time Constraints: Chair: Rolf Ernst, Technical University of Braunschweig, Germany

Process Versions in Rapid Prototyping (Abstract)

Achim Österling , Technical University of Braunschweig
Rolf Ernst , Technical University of Braunschweig
pp. 94

The REAR Framework for Emulation and Analysis of Embedded Hard Real-Time Systems (Abstract)

Stefan Petters , Technische Universit?t M?nchen
Annette Muth , Technische Universit?t M?nchen
Thomas Kolloch , Technische Universit?t M?nchen
Thomas Hopfner , Technische Universit?t M?nchen
Franz Fischer , Technische Universit?t M?nchen
Georg Färber , Technische Universit?t M?nchen
pp. 100

Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems (Abstract)

Frank-Michael Renner , Darmstadt University of Technology
Jürgen Becker , Darmstadt University of Technology
Manfred Glesner , Darmstadt University of Technology
pp. 108

Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping (Abstract)

Oliver Bringmann , Universit?t T?bingen
Wolfgang Rosenstiel , Universit?t T?bingen
Annette Muth , Technische Universit?t M?nchen
Georg Färber , Technische Universit?t M?nchen
Frank Slomka , Universit?t Erlangen-N?rnberg
Richard Hofmann , Universit?t Erlangen-N?rnberg
pp. 114

A Scalable Hardware Library for the Rapid Prototyping of SDL Specifications (Abstract)

Matthias Doerfel , University of Erlangen-Nuremberg
Frank Slomka , University of Erlangen-Nuremberg
Richard Hofmann , University of Erlangen-Nuremberg
pp. 120
Session 7: Partitioning, Scheduling and Performance Analysis: Chair: Rudy Lauwereins, Katholieke University Leuven, Belgium

FPGA Partitioning for Rapid Prototyping : A 1 Million Gate Design Case Study (Abstract)

Helena Krupnova , Institut National Polytechnique de Grenoble, CSI
Christian Rabedaoro , Institut National Polytechnique de Grenoble, CSI
Gabriele Saucier , Institut National Polytechnique de Grenoble, CSI
pp. 128

Scheduling Strategies and Estimations for Concept-Oriented Rapid Prototyping (Abstract)

A. Burst , University of Karlsruhe
M. Wolff , University of Karlsruhe
M. Kühl , University of Karlsruhe
K. Müller-Glaser , University of Karlsruhe
pp. 140

Performance Analysis of a RTOS by Emulation of an Embedded System (Abstract)

Karlheinz Weiss , University of Tuebingen
Thorsten Steckstor , University of Tuebingen
Wolfgang Rosenstiel , University of Tuebingen
pp. 146
Session 8: Overview and Comparison: Chair: Rudy Lauwereins, Katholieke University Leuven, Belgium

System-Level Verification -- A Comparison of Approaches (Abstract)

Ray Turner , Quickturn Design Systems
pp. 154

A Case Study: Logic Emulation - Pitfalls and Solutions (Abstract)

Klaus Harbich , University of Hanover
Joern Stohmann , University of Hanover
Erich Barke , University of Hanover
Ludwig Schwoerer , NOKIA Research Center
pp. 160
Session 9: Design Methodologies: Chair: Klaus D. M?ller-Glaser, University of Karlsruhe, Germany

System Level Virtual Prototyping of DSP ASICs Using Grammar Based Approach (Abstract)

Ahmed Hemani , ESD Lab, KTH, Electrum
Johnny Öberg , ESD Lab, KTH, Electrum
Abhijit Kumar Deb , ESD Lab, KTH, Electrum
Dan Lindqvist , Ericsson Radio Systems AB
Björn Fjellborg , Ericsson Radio Systems AB
pp. 166

A Rapid Modeling Tool for Virtual Prototypes (PDF)

Walling R. Cyre , Virginia Technical Institute
Jeffrey Hess , Virginia Technical Institute
Andreas Gunawan , Virginia Technical Institute
Ritesh Sojitra , Virginia Technical Institute
pp. 178

Model Based Multi-Level Prototyping (Abstract)

Ansgar Bredenfeld , Institute for Autonomous Intelligent Systems (AiS)
Jörg Wilberg , Institute for Autonomous Intelligent Systems (AiS)
pp. 190

Extended Synchronous Dataflow for Efficient DSP System Prototyping (Abstract)

Chanik Park , Seoul National University
Jaewoong Chung , Seoul National University
Soonhoi Ha , Seoul National University
pp. 196
Session 10: Interface Technologies: Chair: Klaus Buchenrieder, Siemens AG, Munich, Germany

Interface Technologies for Versatile Rapid-Prototyping Systems (Abstract)

B. Spitzer , University of Karlsruhe
A. Burst , University of Karlsruhe
M. Wolff , University of Karlsruhe
K. D. Müller-Glaser , University of Karlsruhe
pp. 204

Field Programmable Multi Chip Modules using Programmable Laser Interconnects (Abstract)

Vikram Pasham , University of South Florida
Wilfrido A. Moreno , University of South Florida
Fernando J. Falquez , University of South Florida
pp. 210
Session 11: Re-Engineering Technologies: Chair: Marleen Ad?, Katholieke University Leuven, Belgium

Architectural Re-Engineering of Janus using Object Modeling and Rapid Prototyping (Abstract)

Man-Tak Shing , Naval Postgraduate School
Luqi , Naval Postgraduate School
Valdis Berzins , Naval Postgraduate School
Michael Saluto , Naval Postgraduate School
Julian Williams , Naval Postgraduate School
pp. 216

A Rapid Prototyping Methodology for Reverse Engineering of Legacy Electronic Systems (Abstract)

Scott Deno , Pennsylvania State University
David Landis , Pennsylvania State University
Paul Hulina , Pennsylvania State University
Sanjay Balasubramanian , Intel Corporation
pp. 222
Session 12: FPGA-Based Design: Chair: Marleen Ad?, Katholieke University Leuven, Belgium

A Universal Module Generator for LUT-Based FPGAs (Abstract)

Joerg Abke , University of Hannover
Erich Barke , University of Hannover
Joern Stohmann , Infineon Technologies DAT CAD HW
pp. 230

Incremental Compilation for Logic Emulation (Abstract)

Russell Tessier , University of Massachusetts at Amherst
pp. 236

Author Index (PDF)

pp. 242
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