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Rapid System Prototyping, IEEE International Workshop on (1996)
Thessaloniki, GREECE
June 19, 1996 to June 21, 1996
ISSN: 1074-6005
ISBN: 0-8186-7603-5
TABLE OF CONTENTS

Introduction (PDF)

pp. viii
Session 1: Emulation

Design Verification based on Hardware Emulation (Abstract)

H.N. Nguyen , BULL, FRANCE
M. Thill , BULL, FRANCE
pp. 2

A novel approach to real-time verification of transport system design using FPGA based emulator (Abstract)

K. Yamada , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
N. Ohta , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
T. Miyazaki , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
K. Shirakawa , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
K. Hayashi , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
T. Ichimori , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
K. Fukami , NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan
pp. 5

A platform for co-design and co-synthesis based on FPGA (Abstract)

M. Goeke , Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
J.-Y. Perrier , Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
J. Linder , Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
E. Mosanya , Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
E. Sanchez , Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
F. Rampogna , Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
pp. 11
Session 2: Hardware Software Codesign

Aspects of system modelling in Hardware/Software partitioning (Abstract)

P. Voigt Knudsen , Dept. of Inf. Technol., Tech. Univ., Lyngby, Denmark
J. Madsen , Dept. of Inf. Technol., Tech. Univ., Lyngby, Denmark
pp. 18

Automatic generation of interprocess communication in the PARAGON system (Abstract)

X. Xiong , Forschungszentrum Inf., Karlsruhe, Germany
P. Gutberiet , Forschungszentrum Inf., Karlsruhe, Germany
W. Rosenstiel , Forschungszentrum Inf., Karlsruhe, Germany
pp. 24

Hierarchical Partitioning in a Rapid Prototyping Environment (Abstract)

Ulrike Ober , Darmstadt University of Technology
Juergen Herpel , Dornier Satellitensysteme GmbH
pp. 30

Capturing Time Constraints by Using Petri-nets in the Context of Hardware/Software Codesign. (Abstract)

Paulo Maciel , Universidade Federal de Pernambuco, Brazil
Edna Barros , Universidade Federal de Pernambuco, Brazil
pp. 36
Session 3: Rapid System Prototyping for Telecom

Rapid Prototyping of a CATV Network Termination for ATM-based Video-on-demand Services (Abstract)

B. Staelens , University of Gent, Belgium
J. Vandewege , University of Gent, Belgium
V. Vande Keere , University of Gent, Belgium
pp. 44

Embedded test environment (Abstract)

V. Olive , CNET, Meylan, France
S. Martin , CNET, Meylan, France
pp. 50

Real-time Emulation Method for ATM Switching Systems in Broadband ISDN (Abstract)

Keiji Ishikawa , NTT Network Service Systems Laboratories NTT LSI Laboratories()
Ryoichi Yamaguchi , NTT Network Service Systems Laboratories NTT LSI Laboratories()
Tsuneo Matsumura , NTT Network Service Systems Laboratories NTT LSI Laboratories()
Naoaki Yamanaka , NTT Network Service Systems Laboratories NTT LSI Laboratories()
pp. 55

Rapid protocol prototyping from message sequence chart based specification (Abstract)

K. Ishikawa , NTT LSI Labs., Atsugi, Japan
T. Hoshino , NTT LSI Labs., Atsugi, Japan
pp. 61
Session 4: Cosimulation

An integrated hardware-software cosimulation environment with automated interface generation (Abstract)

Yongjoo Kim , LG Electron. Res. Center, Seoul, South Korea
Kiyoung Choi , LG Electron. Res. Center, Seoul, South Korea
Kyuseok Kim , LG Electron. Res. Center, Seoul, South Korea
Youngsoo Shin , LG Electron. Res. Center, Seoul, South Korea
pp. 66

Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience (Abstract)

C.A. Valderrama , TIMA Lab., Inst. Nat. Polytech. de Grenoble, France
A.A. Jerraya , TIMA Lab., Inst. Nat. Polytech. de Grenoble, France
F. Nacabal , TIMA Lab., Inst. Nat. Polytech. de Grenoble, France
P. Paulin , TIMA Lab., Inst. Nat. Polytech. de Grenoble, France
pp. 72

Simulating hardware, software and electromechanical parts using communicating simulators (Abstract)

A.N. Birbas , Electr. Eng. & Comput. Technol. Dept., Patras Univ., Greece
N.C. Petrellis , Electr. Eng. & Comput. Technol. Dept., Patras Univ., Greece
G.D. Papadopoulos , Electr. Eng. & Comput. Technol. Dept., Patras Univ., Greece
M.K. Birbas , Electr. Eng. & Comput. Technol. Dept., Patras Univ., Greece
E.P. Mariatos , Electr. Eng. & Comput. Technol. Dept., Patras Univ., Greece
pp. 78

A smoothly upgradable approach to virtual emulation of HW/SW systems (Abstract)

G. Gori , DEIS, Bologna Univ., Italy
M. Borgatti , DEIS, Bologna Univ., Italy
R. Guerrieri , DEIS, Bologna Univ., Italy
R. Rambaldi , DEIS, Bologna Univ., Italy
pp. 83
Session 5: System Level Specification

Object oriented prototyping at the system level: an image reconstruction application example (Abstract)

A.N. Birbas , Dept. of Electr. Eng., Patras Univ., Greece
E.P. Mariatos , Dept. of Electr. Eng., Patras Univ., Greece
N. Petrellis , Dept. of Electr. Eng., Patras Univ., Greece
M.K. Birbas , Dept. of Electr. Eng., Patras Univ., Greece
pp. 90

HW/SW specification using OOM techniques (Abstract)

J.P. Teixeira , INESC, Lisbon, Portugal
M. Calha , INESC, Lisbon, Portugal
I.C. Teixeira , INESC, Lisbon, Portugal
pp. 96

A multi formalisms prototyping approach from formal description to implementation of distributed systems (Abstract)

A. Diagne , MASI Lab., Paris VI Univ., France
F. Kordon , MASI Lab., Paris VI Univ., France
pp. 102

Fast prototyping of memory models in VHDL for hardware emulation (Abstract)

S. Maginot , LEDA S.A., Meylan, France
K. O'Brien , LEDA S.A., Meylan, France
pp. 108
Session 6: Design Methods

Industrial approach in design methodologies for mobile communications systems (Abstract)

D.E. Metafas , Dev. Programmes Dept., INTRACOM S.A., Attika, Greece
H.C. Karathanasis , Dev. Programmes Dept., INTRACOM S.A., Attika, Greece
S.V. Blionas , Dev. Programmes Dept., INTRACOM S.A., Attika, Greece
pp. 122
Session 7: Design Cases

CO: the Chameleon 64-bit microprocessor ASIC prototype (Abstract)

F. Pogodalla , SGS-Thomson Microelectron., Meylan, France
B. Ramanadin , SGS-Thomson Microelectron., Meylan, France
pp. 140

Rapid-Prototyping of a CAN-Bus Controller: A Case Study (Abstract)

Alexander Wilmes , Darmstadt University of Technology
Andreas Kirschbaum , Darmstadt University of Technology
Manfred Glesner , Darmstadt University of Technology
Frank Michael Renner , Darmstadt University of Technology
pp. 146

Rapid prototyping of a communication controller for the CAN bus (Abstract)

A. Winter , Dept. of Electron. Syst. & Microsyst., Forschungszentrum Inf. Karlsruhe, Germany
D. Bittruf , Dept. of Electron. Syst. & Microsyst., Forschungszentrum Inf. Karlsruhe, Germany
K.D. Muller-Glaser , Dept. of Electron. Syst. & Microsyst., Forschungszentrum Inf. Karlsruhe, Germany
Y. Tanurhan , Dept. of Electron. Syst. & Microsyst., Forschungszentrum Inf. Karlsruhe, Germany
pp. 152

Fast prototyping based on generic and synthesizable VHDL models. A case study: punctured Viterbi decoders (Abstract)

P. Senn , CNET, Meylan, France
C. Deltoso , CNET, Meylan, France
C. Joanblanq , CNET, Meylan, France
M. Cand , CNET, Meylan, France
pp. 158
Session 8: Algorithms for Rapid System

Implementing DSP applications on heterogeneous targets using minimal size data buffers (Abstract)

J.A. Peperstrate , ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
R. Lauwereins , ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
M. Ade , ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
pp. 166

Miami: a hardware software co-simulation environment (Abstract)

R. Klein , Mentor Graphics Corp., Beaverton, OR, USA
pp. 173

Prototyping and reengineering of microcontroller-based systems (Abstract)

L. Carro , Dept. de Engenharia Electrica & Pos Graduacao em Ciencia de Computacao, Univ. Federal do Rio Grande do Sul, Porto Alegre, Brazil
A. Suzim , Dept. de Engenharia Electrica & Pos Graduacao em Ciencia de Computacao, Univ. Federal do Rio Grande do Sul, Porto Alegre, Brazil
Pereira , Dept. de Engenharia Electrica & Pos Graduacao em Ciencia de Computacao, Univ. Federal do Rio Grande do Sul, Porto Alegre, Brazil
pp. 178

MCG: a correct-by-design multichip module router with crosstalk avoidance (Abstract)

Donghui Li , Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
J.D. Carothers , Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
T. Hameenanttila , Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
pp. 183

Index of Authors (PDF)

pp. 189
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