The Community for Technology Leaders
Rapid System Prototyping, IEEE International Workshop on (1995)
Chapel Hill, North Carolina
June 7, 1995 to June 9, 1995
ISSN: 1074-6005
ISBN: 0-8186-7100-9
TABLE OF CONTENTS
Session 1: Keynote Presentation
Session 2: Trade-Off Between Hardware and Software Implementations

The extended partitioning problem: hardware/software mapping and implementation-bin selection (Abstract)

A. Kalavade , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
E.A. Lee , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
pp. 12

Arbitrary hardware software trade-offs (Abstract)

P.F.A. Middelhoek , Twente Univ., Enschede, Netherlands
pp. 19

Analysis of real-time embedded systems for co-design (Abstract)

L.P.M. Benders , Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands
pp. 26

Adaptation of force-directed scheduling algorithm for hardware/software partitioning (Abstract)

J. Benzakki , Evry Univ., France
M. Israel , Evry Univ., France
J.-M. Berge , Evry Univ., France
F. Rousseau , Evry Univ., France
pp. 33
Session 3: Prototyping Environments with Target Platform Consisting of Processors and FPGAs

Hardware-software codesign with GRAPE (Abstract)

J.A. Peperstraete , ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
M. Ade , ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
R. Lauwereins , ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
pp. 40

Rapid prototyping in microsystems development (Abstract)

M. Georges-Schleuter , Tech. Hochschule Darmstadt, Germany
W. Suss , Tech. Hochschule Darmstadt, Germany
W. Jakob , Tech. Hochschule Darmstadt, Germany
H. Eggert , Tech. Hochschule Darmstadt, Germany
M. Glesner , Tech. Hochschule Darmstadt, Germany
H.-J. Herpel , Tech. Hochschule Darmstadt, Germany
pp. 48

A prototyping system for verification and evaluation in hardware-software cosynthesis (Abstract)

I. Konenkamp , Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
P. Schuler , Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
T. Benner , Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
H.-C. Schaub , Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
R. Ernst , Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
pp. 54
Session 4: Industrial Applications I

Modeling and rapid prototyping of avionics using STATEMATE (Abstract)

A.E.K. Sahraoui , CNRS, Univ. Joseph Fourier, Grenoble, France
A. Jeffroy , CNRS, Univ. Joseph Fourier, Grenoble, France
M. Romdhani , CNRS, Univ. Joseph Fourier, Grenoble, France
P. de Chazelles , CNRS, Univ. Joseph Fourier, Grenoble, France
A.A. Jerraya , CNRS, Univ. Joseph Fourier, Grenoble, France
pp. 62

The application of rapid prototyping to underwater acoustic modem research and development (Abstract)

P. Fiore , Woods Hole Oceanogr. Instn., MA, USA
E. Will , Woods Hole Oceanogr. Instn., MA, USA
G. Edelson , Woods Hole Oceanogr. Instn., MA, USA
D. Herold , Woods Hole Oceanogr. Instn., MA, USA
pp. 68

Development and prototyping system far an 8-bit multitask micropower processor (Abstract)

S. Fink , Logic Syst. Lab., Swiss Federal Inst. of Technol., Lausanne, Switzerland
E. Sanchez , Logic Syst. Lab., Swiss Federal Inst. of Technol., Lausanne, Switzerland
pp. 75
Session 5: Industrial Applications II

Rapid prototyping of DSP systems: requirements and solutions (Abstract)

P. van Lierop , Philips ITCL, Belgium
S. Note , Philips ITCL, Belgium
J. van Ginderdeuren , Philips ITCL, Belgium
pp. 88

A methodology for rapid prototyping of real-time image processing VLSI systems (Abstract)

G.M. Quenot , Lab. Syst. de Perception, Etablissement Tech. Central de l'Armement, Arcueil, France
B. Zavidovique , Lab. Syst. de Perception, Etablissement Tech. Central de l'Armement, Arcueil, France
I.C. Kralijic , Lab. Syst. de Perception, Etablissement Tech. Central de l'Armement, Arcueil, France
pp. 97

Testing and optimizing a scale reduction algorithm for a multi-screen video wall application on the META-100 ASIC emulator (Abstract)

J. Schaumont , Fac. des Polytech., Mons Univ., Belgium
O. Rasmont , Fac. des Polytech., Mons Univ., Belgium
R. Crappe , Fac. des Polytech., Mons Univ., Belgium
J. Koulischer , Fac. des Polytech., Mons Univ., Belgium
pp. 104

Development of a real-time motion image encoder using codesign methodology (Abstract)

N.A. Halang , City Univ. of Hong Kong, Hong Kong
C.W. Chau , City Univ. of Hong Kong, Hong Kong
S. Kwong , City Univ. of Hong Kong, Hong Kong
K.F. Man , City Univ. of Hong Kong, Hong Kong
A.D. Stoyenko , City Univ. of Hong Kong, Hong Kong
pp. 110
Session 6: Prototyping of Software I

A rapid protocol prototyping development system (Abstract)

A. Jirachiefpattana , Dept. of Comput. Sci. & Eng., La Trobe Univ., Bundoora, Vic., Australia
R. Lai , Dept. of Comput. Sci. & Eng., La Trobe Univ., Bundoora, Vic., Australia
pp. 118

A case study on rapid systems prototyping and its impact on system evolution (Abstract)

H. Bond , Rome Lab., Griffiss AFB, NY, USA
D. Spencer , Rome Lab., Griffiss AFB, NY, USA
C.L. Burns , Rome Lab., Griffiss AFB, NY, USA
J.L. Sidoran , Rome Lab., Griffiss AFB, NY, USA
S. Maethner , Rome Lab., Griffiss AFB, NY, USA
pp. 125

H-COSTAM: a hierarchical communicating state-machine model for generic prototyping (Abstract)

F. Kordon , Lab. MASI, Univ. Pierre et Marie Curie, Paris, France
W.E. Kaim , Lab. MASI, Univ. Pierre et Marie Curie, Paris, France
pp. 131
Session 7: Prototyping of Software II

CASE tools evaluation: an automatic process based on fuzzy sets theory (Abstract)

K. Agavanakis , Dept. of Electr. Eng., Patras Univ., Greece
V. Makios , Dept. of Electr. Eng., Patras Univ., Greece
T. Antonakopoulos , Dept. of Electr. Eng., Patras Univ., Greece
pp. 140

Survey into the acceptance of prototyping in software development (Abstract)

R.M. Kimmond , Staffordshire Univ., Stafford, UK
pp. 147
Session 8: VHDL Simulation

Rapid system prototyping, system modeling, and analysis in a hardware-software codesign environment (Abstract)

S. Mohanty , AT&T Bell Labs., Allentown, PA, USA
P.A. Wilsey , AT&T Bell Labs., Allentown, PA, USA
pp. 154

VHDL virtual prototyping (Abstract)

L. Berrojo , Dept. of Design Technol., TGI S.A., Madrid, Spain
S. Olcoz , Dept. of Design Technol., TGI S.A., Madrid, Spain
L. Entrena , Dept. of Design Technol., TGI S.A., Madrid, Spain
pp. 161

A case study of system synthesis with non-synthesizable components using extended VHDL (Abstract)

A. Dollas , Dept. of Electr. Eng., Duke Univ., Durham, NC, USA
J.D.S. Babcock , Dept. of Electr. Eng., Duke Univ., Durham, NC, USA
pp. 168

Modeling a versatile FPGA for prototyping adaptive systems (Abstract)

W.H. Debany, Jr. , Rome Lab., Griffiss AFB, NY, USA
S. Hariri , Rome Lab., Griffiss AFB, NY, USA
K.A. Kwiat , Rome Lab., Griffiss AFB, NY, USA
pp. 174
Session 9: Prototyping Environments with Target IPlatform Consisting of Processors

Rapid prototyping fault-tolerant heterogeneous digital signal processing systems (Abstract)

E.E. Swartzlander, Jr. , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
M.S. Khan , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
pp. 187

Converting graphical DSP programs into memory constrained software prototypes (Abstract)

P.K. Murthy , Hitachi America Ltd., Brisbane, CA, USA
E.A. Lee , Hitachi America Ltd., Brisbane, CA, USA
S.S. Bhattacharyya , Hitachi America Ltd., Brisbane, CA, USA
pp. 194

Circuit partitioning with partial order for mixed simulation emulation environment (Abstract)

G.S. Manku , Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Bombay, India
S. Kumar , Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Bombay, India
A. Kumar , Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Bombay, India
pp. 201
Session 10: Prototyping Environments with Target Platform Consisting of FPGAs

System Validation by Source Level Emulation of Behavioral VHDL Specifications (Abstract)

Wolfgang Rosenstiel , FZI and University of T?bingen, T?bingen, Germany
pp. 210

Imposing a unified design methodology on independent rapid prototyping tools (Abstract)

G. Jennings , Div. of Comput. Sci., Lulea Univ. of Technol., Sweden
A. Hedberg , Div. of Comput. Sci., Lulea Univ. of Technol., Sweden
H. Jacobson , Div. of Comput. Sci., Lulea Univ. of Technol., Sweden
M. Einarsson , Div. of Comput. Sci., Lulea Univ. of Technol., Sweden
pp. 217

Application of synthesis to support hardware emulation (Abstract)

H.N. Nguyen , Hardware Dev. Paris-Angers, Les Clayes-sous-Bois, France
Y. Gressus , Hardware Dev. Paris-Angers, Les Clayes-sous-Bois, France
M. D'Hoe , Hardware Dev. Paris-Angers, Les Clayes-sous-Bois, France
pp. 223

A 145 MHz user-programmable gate array (Abstract)

E. do Valle Simoes , Federal Univ. of Rio Grande do Sul, Porto Algere, Brazil
D.A.C. Barone , Federal Univ. of Rio Grande do Sul, Porto Algere, Brazil
pp. 226

Author Index (PDF)

pp. 233
81 ms
(Ver 3.3 (11022016))