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Reconfigurable Computing and FPGAs, International Conference on (2008)
Dec. 3, 2008 to Dec. 5, 2008
ISBN: 978-0-7695-3474-9
pp: 181-186
ABSTRACT
Network on chip (NoC) has emerged as the design paradigm for scalable System on Chip with harsh bandwidth requirements. However, current NoCs remain not flexible enough to support communication dynamic behaviors (size, instances) inherent to a growing majority of embedded systems. Few solutions have been proposed to make NoC reconfigurable using different methods but,to the best of our knowledges, none of them has a clear and reusable design methodology. The first objective of this paper is to propose an overview of existing work as a starting point for research in this domain. Then to deal with the current situation, we introduce a description of a dynamic reconfiguration model for NoC and enumerate several outstanding research issues organized on three topics: dynamic reconfiguration administration, network infrastructure reconfiguration and network protocols reconfiguration.
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CITATION
J.-Ph. Diguet, M. Sevaux, R. Dafali, "Key Research Issues for Reconfigurable Network-on-Chip", Reconfigurable Computing and FPGAs, International Conference on, vol. 00, no. , pp. 181-186, 2008, doi:10.1109/ReConFig.2008.72
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