2012 16th Panhellenic Conference on Informatics (2012)
Piraeus, Greece Greece
Oct. 5, 2012 to Oct. 7, 2012
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/PCi.2012.45
OpenCL has been proposed as an open standard for application development in heterogeneous multi-core architectures, utilizing different CPU, DSP and GPU types and configurations. Recently, the technological advances in FPGA devices, offering hundreds of GFLOPs with maximum power efficiency, has turned the parallel processing community towards them. However, FPGA programming requires expertise in a different field as well as the appropriate tools and methodologies. A promising solution, gaining wider acceptance lately, is the use of ESL and high-level synthesis methodologies, supporting C/C++ based hardware design. Starting from high-level synthesis, this paper presents a methodology for the adoption of OpenCL as an FPGA programming environment. Specifically, the opportunities as well as the obstacles imposed to the application developer by the FPGA computing platform and the use of C/C++ as input language are presented, and a systematic way to explore both data level and thread level parallelism is given. Experimental result show that efficient design space exploration is supported, with overall system level performance boost of up to 9x, compared to equivalent GPU implementations.
Kernel, Field programmable gate arrays, Hardware, Parallel processing, Computer architecture, Programming, Indexes, parallel processing, OpenCL, multi-core architectures, FPGAs, high-level synthesis
George Economakos, "ESL as a Gateway from OpenCL to FPGAs: Basic Ideas and Methodology Evaluation", 2012 16th Panhellenic Conference on Informatics, vol. 00, no. , pp. 80-85, 2012, doi:10.1109/PCi.2012.45