The Community for Technology Leaders
2011 15th Panhellenic Conference on Informatics (2011)
Kastoria, Greece
Sept. 30, 2011 to Oct. 2, 2011
ISBN: 978-0-7695-4389-5
pp: 183-187
In this contribution, behavioral synthesis tools are used for hardware implementation of a cellular neural network with the ability to accomplish image processing tasks in real time. Behavioral synthesis tools such as the CCC HLS framework can deliver correct-by-construction RTL VHDL implementations of computation-intensive applications such as image processing and cellular neural networks. The tool applies formal techniques to transform behavioral ADA specifications into RTL micro-architectures which then can be easily implemented by commercial RTL synthesizers. Example applications such as, edge-detection, half toning and morphological operations, validate the presented contribution.
behavioral synthesis, high-level synthesis, ASIC-FPGA design, cellular neural networks, edge detection, halftoning, image morphology

D. Amanatidis and M. Dossis, "Use of Behavioral Synthesis to Implement a Cellular Neural Network for Image Processing Applications," 2011 15th Panhellenic Conference on Informatics(PCI), Kastoria, Greece, 2011, pp. 183-187.
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