IEEE International Performance Computing and Communications Conference (2011)
Orlando, FL, USA
Nov. 17, 2011 to Nov. 19, 2011
Pollawat Thanarungroj , Department of Electrical and Computer Engineering, Florida International University, Miami, Florida 33174
Chen Liu , Department of Electrical and Computer Engineering, Florida International University, Miami, Florida 33174
As semiconductor manufacturing technology continues to scale down, it is possible to integrate more transistors into a processor, which gives birth to many-core processor design. This paper introduces an approach to analyze the power and energy consumption of a many-core research platform. The investigation has been done by using the Intel SCC system as an experimental platform. The approach is to collect the time and power profiling of an executing parallel application on the Intel SCC system. And then, the total energy consumed by the entire execution is calculated as a consequence. We studied the effects of power and energy consumption in many-core systems by varying different hardware configuration parameters such as number of cores, clock frequency and voltage level. Thus, the many-core system can be explored for its scalability and fitness in operational cost and performance.
C. Liu and P. Thanarungroj, "Power and energy consumption analysis on intel SCC many-core system," IEEE International Performance Computing and Communications Conference(PCCC), Orlando, FL, USA, 2011, pp. 1-2.