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IEEE International Performance Computing and Communications Conference (2011)
Orlando, FL, USA
Nov. 17, 2011 to Nov. 19, 2011
ISBN: 978-1-4673-0010-0
pp: 1-7
Thuan Duong-Ba , School of EECS, Oregon State University
Thinh Nguyen , School of EECS, Oregon State University
Patrick Chiang , School of EECS, Oregon State University
ABSTRACT
In this paper, we present our initial results of improving communication performance in chip multicore processors by applying Network Coding (NC) at intermediate routers. Routers with NC capability enable two flit flows on the same communication links at the same time. Consequently, simulation results show that throughput and delay are improved with the proposed NC architecture. For saturated uni-cast communications in a 6-core network-on-a-chip, throughput can be improved up to 2.3 times with a negligible penalty of average latency at about 2.5 cycles. On the other hand, for saturated multi-cast communications in a 9-core network-on-a-chip, average latency can be reduced from over 1000 cycles to just about 37 cycles and throughput can be increased by 1.4 times.
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CITATION
Thuan Duong-Ba, Thinh Nguyen, Patrick Chiang, "Network coding in multicore processors", IEEE International Performance Computing and Communications Conference, vol. 00, no. , pp. 1-7, 2011, doi:10.1109/PCCC.2011.6108067
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