Performance, Computing, and Communications Conference, 2002. 21st IEEE International (2002)
Phoenix, AZ, USA
Apr. 3, 2002 to Apr. 5, 2002
S. Asaad , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Development of adaptive parallel embedded systems represents a difficult design challenge, particularly in resource-constrained applications. This paper presents a system-level performance modeling environment that aids in the design and analysis of these systems by allowing rapid evaluation of many design and architecture alternatives. The environment aims at a high level of modeling abstraction by separating functionality from performance, abstracting the data flow in the system and caching component delays measured by lower level simulation tools. VHDL is used as a homogeneous executable modeling language to describe both hardware and software components in the system. A case study in modeling the automatic target recognition (ATR) system is used to show the effectiveness of the performance modeling environment. An example showing the modeling of adaptive system behavior is also presented. The model runs an order of magnitude faster than low-level instruction set simulators. The accuracy of the model is within 10% of the actual target system in predicting the overall performance of the ATR system.
S. Asaad and T. Bapty, "Performance modeling for adaptive parallel embedded systems," Performance, Computing, and Communications Conference, 2002. 21st IEEE International(PCC), Phoenix, AZ, USA, 2002, pp. 57-64.