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Parallel Algorithms / Architecture Synthesis, AIZU International Symposium on (1997)
Aizu-Wakamatsu, Fukushima, JAPAN
Mar. 17, 1997 to Mar. 21, 1997
ISBN: 0-8186-7870-4
pp: 31
Hiroshi Nakamura , Univeristy of Tokyo
Yoichi IwasakiI , University of Tsukuba
Taisuke Boku , University of Tsukuba
Kisaburo Nakazawa , Electrocommunication University
ABSTRACT
CP-PACS (Computational Physics by Parallel Array Computer System) is a massively parallel processor with 2048 Processing Units built at Center for Computational Physics, University of Tsukuba. The node processor of CP-PACS is a RISC microprocessor enhanced by Psuedo Vector Processing feature, which can realize high-performance vector processing. The interconnection network is 3-dimensional Hyper-Crossbar Network, which has high flexibility and embeddability for various network topologies and communication patterns. The theoretical peak performance of whole system is 614.4 GFLOPS. In this paper, we describe the overview of CP-PACS architecture and several special architectural characteristics of it. The performance evaluation on parallel LINPACK benchmark is also shown.
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CITATION
Hiroshi Nakamura, Yoichi IwasakiI, Taisuke Boku, Kisaburo Nakazawa, "The Architecture of Massively Parallel Processor CP-PACS", Parallel Algorithms / Architecture Synthesis, AIZU International Symposium on, vol. 00, no. , pp. 31, 1997, doi:10.1109/AISPAS.1997.581622
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