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Parallel Algorithms / Architecture Synthesis, AIZU International Symposium on (1995)
Aizu-Wakamatsu, Fukushima, Japan
Mar. 15, 1995 to Mar. 17, 1995
ISBN: 0-8186-7038-X
pp: 315
M. Pantano , Inst. for Software Technol. & Parallel Syst., Wien Univ., Austria
H. Zima , Inst. for Software Technol. & Parallel Syst., Wien Univ., Austria
B. Chapman , Inst. for Software Technol. & Parallel Syst., Wien Univ., Austria
ABSTRACT
We describe the design of a compilation system, which translates Fortran programs automatically into explicitly parallel programs for a massively parallel architecture. Such a compiler must automatically generate data distributions and derive program transformation strategies based on a combination of heuristics and analysis features. Programs are subjected to an iterative tuning process, involving three major components: a restructuring system, a performance analysts subsystem, and a parallelization support environment. Many of the components in this environment have already been implemented in the framework of the Vienna Fortran compilation system.
INDEX TERMS
FORTRAN; program compilers; parallel architectures; message passing; supercompilers; massively parallel architectures; compilation system; Fortran programs; explicitly parallel programs; data distributions; program transformation strategies; iterative tuning process; restructuring system; performance analysts subsystem; parallelization support environment; Vienna Fortran compilation system
CITATION
M. Pantano, H. Zima, B. Chapman, "Supercompilers for massively parallel architectures", Parallel Algorithms / Architecture Synthesis, AIZU International Symposium on, vol. 00, no. , pp. 315, 1995, doi:10.1109/AISPAS.1995.401323
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